[clang] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in riscv_vector.td (PR #65944)
Yingwei Zheng via cfe-commits
cfe-commits at lists.llvm.org
Mon Sep 11 04:21:21 PDT 2023
================
@@ -1660,29 +1660,29 @@ let HasMasked = false, MaskedPolicyScheme = NonePolicy in {
defm vmsbc : RVVIntMaskOutBuiltinSet;
}
-// 12.5. Vector Bitwise Logical Instructions
+// 11.5. Vector Bitwise Logical Instructions
let UnMaskedPolicyScheme = HasPassthruOperand in {
defm vand : RVVIntBinBuiltinSet;
defm vxor : RVVIntBinBuiltinSet;
defm vor : RVVIntBinBuiltinSet;
}
defm vnot_v : RVVPseudoVNotBuiltin<"vxor", "csil">;
-// 12.6. Vector Single-Width Bit Shift Instructions
+// 11.6. Vector Single-Width Bit Shift Instructions
----------------
dtcxzyw wrote:
11.6. Vector Single-Width Shift Instructions
https://github.com/llvm/llvm-project/pull/65944
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