[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

Phoebe Wang via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Sun Sep 10 19:19:00 PDT 2023


pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:271
 
+  // Attach EVEX512 feature when we have AVX512 features and EVEX512 is not set.
+  size_t posNoEVEX512 = FS.rfind("-evex512");
----------------
pengfei wrote:
> skan wrote:
> > It seems the change in X86.cpp is redundant?
> It's not. We need `FeatureEVEX512` because it's independent of `FeatureAVX512`. We will have future AVX10-256 targets that have `FeatureAVX512` only.
> Here we handle old IR that don't set `evex512` in function attributes.
It has affects to AVX10-256 targets too, we need to restrict it to default CPU, see https://github.com/llvm/llvm-project/pull/65920


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159250/new/

https://reviews.llvm.org/D159250



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