[PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Dave Green via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Sun Sep 3 23:55:28 PDT 2023
dmgreen added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:6309
+
+ def : Pat<(v1f64 (OpNode (v1f64 FPR64:$Rn))),
+ (!cast<Instruction>(NAME # Dr) FPR64:$Rn)>;
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I think the instructions in this multiclass are the vector variants. Can the pattern be moved to the FRIntNNT/SingleOperandFPNo16 class?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158626/new/
https://reviews.llvm.org/D158626
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