[clang] 8609819 - [RISCV] Add feature checks for vector crypto C intrinsics

via cfe-commits cfe-commits at lists.llvm.org
Wed Aug 30 21:03:19 PDT 2023


Author: 4vtomat
Date: 2023-08-30T21:03:08-07:00
New Revision: 8609819eb1c35b72897cb71006968c84db73b0e4

URL: https://github.com/llvm/llvm-project/commit/8609819eb1c35b72897cb71006968c84db73b0e4
DIFF: https://github.com/llvm/llvm-project/commit/8609819eb1c35b72897cb71006968c84db73b0e4.diff

LOG: [RISCV] Add feature checks for vector crypto C intrinsics

Differential Revision: https://reviews.llvm.org/D158257

Added: 
    clang/test/Sema/zvk-invalid-features.c
    clang/test/Sema/zvk-invalid-vlen.c

Modified: 
    clang/include/clang/Basic/riscv_vector.td
    clang/include/clang/Support/RISCVVIntrinsicUtils.h
    clang/lib/Sema/SemaRISCVVectorLookup.cpp
    clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf1-out-of-range.c
    clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf2-out-of-range.c
    clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm3c-out-of-range.c
    clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm4k-out-of-range.c
    clang/utils/TableGen/RISCVVEmitter.cpp

Removed: 
    clang/test/Sema/zvk-invalid.c


################################################################################
diff  --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td
index 7f0df6b729e296..e8040a22d5862a 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -2911,52 +2911,68 @@ multiclass RVVSignedWidenBinBuiltinSetVwsll
 
 let UnMaskedPolicyScheme = HasPassthruOperand in {
   // zvkb
-  defm vandn   : RVVUnsignedBinBuiltinSet;
-  defm vbrev8  : RVVOutBuiltinSetZvbb;
-  defm vrev8   : RVVOutBuiltinSetZvbb;
-  defm vrol    : RVVUnsignedShiftBuiltinSet;
-  defm vror    : RVVUnsignedShiftBuiltinSet;
+  let RequiredFeatures = ["Zvkb"] in {
+    defm vandn   : RVVUnsignedBinBuiltinSet;
+    defm vbrev8  : RVVOutBuiltinSetZvbb;
+    defm vrev8   : RVVOutBuiltinSetZvbb;
+    defm vrol    : RVVUnsignedShiftBuiltinSet;
+    defm vror    : RVVUnsignedShiftBuiltinSet;
+  }
 
   // zvbb
-  defm vbrev   : RVVOutBuiltinSetZvbb;
-  defm vclz    : RVVOutBuiltinSetZvbb;
-  defm vctz    : RVVOutBuiltinSetZvbb;
-  defm vcpopv  : RVVOutBuiltinSetZvbb;
-  let OverloadedName = "vwsll" in
-  defm vwsll   : RVVSignedWidenBinBuiltinSetVwsll;
+  let RequiredFeatures = ["Zvbb"] in {
+    defm vbrev   : RVVOutBuiltinSetZvbb;
+    defm vclz    : RVVOutBuiltinSetZvbb;
+    defm vctz    : RVVOutBuiltinSetZvbb;
+    defm vcpopv  : RVVOutBuiltinSetZvbb;
+    let OverloadedName = "vwsll" in
+    defm vwsll   : RVVSignedWidenBinBuiltinSetVwsll;
+  }
 
   // zvbc
-  defm vclmul  : RVVInt64BinBuiltinSet;
-  defm vclmulh : RVVInt64BinBuiltinSet;
+  let RequiredFeatures = ["Zvbc"] in {
+    defm vclmul  : RVVInt64BinBuiltinSet;
+    defm vclmulh : RVVInt64BinBuiltinSet;
+  }
 }
 
 let UnMaskedPolicyScheme = HasPolicyOperand, HasMasked = false in {
   // zvkg
-  defm vghsh   : RVVOutOp2BuiltinSetVVZvk;
-  defm vgmul   : RVVOutBuiltinSetZvk<HasVV=1, HasVS=0>;
+  let RequiredFeatures = ["Zvkg"] in {
+    defm vghsh   : RVVOutOp2BuiltinSetVVZvk;
+    defm vgmul   : RVVOutBuiltinSetZvk<HasVV=1, HasVS=0>;
+  }
 
   // zvkned
-  defm vaesdf  : RVVOutBuiltinSetZvk;
-  defm vaesdm  : RVVOutBuiltinSetZvk;
-  defm vaesef  : RVVOutBuiltinSetZvk;
-  defm vaesem  : RVVOutBuiltinSetZvk;
-  let UnMaskedPolicyScheme = HasPassthruOperand in
-  defm vaeskf1 : RVVOutOp1BuiltinSet<"vaeskf1", "i", [["vi", "Uv", "UvUvKz"]]>;
-  defm vaeskf2 : RVVOutOp2BuiltinSetVIZvk;
-  defm vaesz   : RVVOutBuiltinSetZvk<HasVV=0>;
+  let RequiredFeatures = ["Zvkned"] in {
+    defm vaesdf  : RVVOutBuiltinSetZvk;
+    defm vaesdm  : RVVOutBuiltinSetZvk;
+    defm vaesef  : RVVOutBuiltinSetZvk;
+    defm vaesem  : RVVOutBuiltinSetZvk;
+    let UnMaskedPolicyScheme = HasPassthruOperand in
+    defm vaeskf1 : RVVOutOp1BuiltinSet<"vaeskf1", "i", [["vi", "Uv", "UvUvKz"]]>;
+    defm vaeskf2 : RVVOutOp2BuiltinSetVIZvk;
+    defm vaesz   : RVVOutBuiltinSetZvk<HasVV=0>;
+  }
 
   // zvknha or zvknhb
-  defm vsha2ch : RVVOutOp2BuiltinSetVVZvk<"il">;
-  defm vsha2cl : RVVOutOp2BuiltinSetVVZvk<"il">;
-  defm vsha2ms : RVVOutOp2BuiltinSetVVZvk<"il">;
+  let RequiredFeatures = ["Zvknha"] in {
+    defm vsha2ch : RVVOutOp2BuiltinSetVVZvk<"il">;
+    defm vsha2cl : RVVOutOp2BuiltinSetVVZvk<"il">;
+    defm vsha2ms : RVVOutOp2BuiltinSetVVZvk<"il">;
+  }
 
   // zvksed
-  let UnMaskedPolicyScheme = HasPassthruOperand in
-  defm vsm4k   : RVVOutOp1BuiltinSet<"vsm4k", "i", [["vi", "Uv", "UvUvKz"]]>;
-  defm vsm4r   : RVVOutBuiltinSetZvk;
+  let RequiredFeatures = ["Zvksed"] in {
+    let UnMaskedPolicyScheme = HasPassthruOperand in
+    defm vsm4k   : RVVOutOp1BuiltinSet<"vsm4k", "i", [["vi", "Uv", "UvUvKz"]]>;
+    defm vsm4r   : RVVOutBuiltinSetZvk;
+  }
 
   // zvksh
-  defm vsm3c   : RVVOutOp2BuiltinSetVIZvk;
-  let UnMaskedPolicyScheme = HasPassthruOperand in
-  defm vsm3me  : RVVOutOp1BuiltinSet<"vsm3me", "i", [["vv", "Uv", "UvUvUv"]]>;
+  let RequiredFeatures = ["Zvksh"] in {
+    defm vsm3c   : RVVOutOp2BuiltinSetVIZvk;
+    let UnMaskedPolicyScheme = HasPassthruOperand in
+    defm vsm3me  : RVVOutOp1BuiltinSet<"vsm3me", "i", [["vv", "Uv", "UvUvUv"]]>;
+  }
 }

diff  --git a/clang/include/clang/Support/RISCVVIntrinsicUtils.h b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
index 72878368ce1a33..8ba57d77221dc5 100644
--- a/clang/include/clang/Support/RISCVVIntrinsicUtils.h
+++ b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
@@ -480,13 +480,21 @@ class RVVIntrinsic {
 
 // RVVRequire should be sync'ed with target features, but only
 // required features used in riscv_vector.td.
-enum RVVRequire : uint8_t {
+enum RVVRequire : uint16_t {
   RVV_REQ_None = 0,
   RVV_REQ_RV64 = 1 << 0,
   RVV_REQ_ZvfhminOrZvfh = 1 << 1,
   RVV_REQ_Xsfvcp = 1 << 2,
-
-  LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_Xsfvcp)
+  RVV_REQ_Zvbb = 1 << 3,
+  RVV_REQ_Zvbc = 1 << 4,
+  RVV_REQ_Zvkb = 1 << 5,
+  RVV_REQ_Zvkg = 1 << 6,
+  RVV_REQ_Zvkned = 1 << 7,
+  RVV_REQ_Zvknha = 1 << 8,
+  RVV_REQ_Zvksed = 1 << 9,
+  RVV_REQ_Zvksh = 1 << 10,
+
+  LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_Zvksh)
 };
 
 // Raw RVV intrinsic info, used to expand later.
@@ -518,7 +526,7 @@ struct RVVIntrinsicRecord {
   uint8_t OverloadedSuffixSize;
 
   // Required target features for this intrinsic.
-  uint8_t RequiredExtensions;
+  uint16_t RequiredExtensions;
 
   // Supported type, mask of BasicType.
   uint8_t TypeRangeMask;

diff  --git a/clang/lib/Sema/SemaRISCVVectorLookup.cpp b/clang/lib/Sema/SemaRISCVVectorLookup.cpp
index ebdd498cc7644a..ae584dc6871990 100644
--- a/clang/lib/Sema/SemaRISCVVectorLookup.cpp
+++ b/clang/lib/Sema/SemaRISCVVectorLookup.cpp
@@ -202,9 +202,17 @@ class RISCVIntrinsicManagerImpl : public sema::RISCVIntrinsicManager {
 void RISCVIntrinsicManagerImpl::ConstructRVVIntrinsics(
     ArrayRef<RVVIntrinsicRecord> Recs, IntrinsicKind K) {
   const TargetInfo &TI = Context.getTargetInfo();
-  static const std::pair<const char *, uint8_t> FeatureCheckList[] = {
+  static const std::pair<const char *, RVVRequire> FeatureCheckList[] = {
       {"64bit", RVV_REQ_RV64},
-      {"xsfvcp", RVV_REQ_Xsfvcp}};
+      {"xsfvcp", RVV_REQ_Xsfvcp},
+      {"experimental-zvbb", RVV_REQ_Zvbb},
+      {"experimental-zvbc", RVV_REQ_Zvbc},
+      {"experimental-zvkb", RVV_REQ_Zvkb},
+      {"experimental-zvkg", RVV_REQ_Zvkg},
+      {"experimental-zvkned", RVV_REQ_Zvkned},
+      {"experimental-zvknha", RVV_REQ_Zvknha},
+      {"experimental-zvksed", RVV_REQ_Zvksed},
+      {"experimental-zvksh", RVV_REQ_Zvksh}};
 
   // Construction of RVVIntrinsicRecords need to sync with createRVVIntrinsics
   // in RISCVVEmitter.cpp.

diff  --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf1-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf1-out-of-range.c
index 10130ba18975b4..2062188634c4d6 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf1-out-of-range.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf1-out-of-range.c
@@ -1,7 +1,7 @@
 // REQUIRES: riscv-registered-target
 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
 // RUN:   -target-feature +v -target-feature +zfh -target-feature +experimental-zvfh \
-// RUN:   -fsyntax-only -verify %s
+// RUN:   -target-feature +experimental-zvkned -fsyntax-only -verify %s
 
 #include <riscv_vector.h>
 

diff  --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf2-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf2-out-of-range.c
index aa84a8b5487564..a0f8ad76c516af 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf2-out-of-range.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vaeskf2-out-of-range.c
@@ -1,7 +1,7 @@
 // REQUIRES: riscv-registered-target
 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
 // RUN:   -target-feature +v -target-feature +zfh -target-feature +experimental-zvfh \
-// RUN:   -fsyntax-only -verify %s
+// RUN:   -target-feature +experimental-zvkned -fsyntax-only -verify %s
 
 #include <riscv_vector.h>
 

diff  --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm3c-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm3c-out-of-range.c
index b578f3df44a441..a2238f01d23084 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm3c-out-of-range.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm3c-out-of-range.c
@@ -1,7 +1,7 @@
 // REQUIRES: riscv-registered-target
 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
 // RUN:   -target-feature +v -target-feature +zfh -target-feature +experimental-zvfh \
-// RUN:   -fsyntax-only -verify %s
+// RUN:   -target-feature +experimental-zvksh -fsyntax-only -verify %s
 
 #include <riscv_vector.h>
 

diff  --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm4k-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm4k-out-of-range.c
index 4af1487b1c5a61..56fa9ed53deb45 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm4k-out-of-range.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsm4k-out-of-range.c
@@ -1,7 +1,7 @@
 // REQUIRES: riscv-registered-target
 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
 // RUN:   -target-feature +v -target-feature +zfh -target-feature +experimental-zvfh \
-// RUN:   -fsyntax-only -verify %s
+// RUN:   -target-feature +experimental-zvksed -fsyntax-only -verify %s
 
 #include <riscv_vector.h>
 

diff  --git a/clang/test/Sema/zvk-invalid-features.c b/clang/test/Sema/zvk-invalid-features.c
new file mode 100644
index 00000000000000..be1170df8f0c71
--- /dev/null
+++ b/clang/test/Sema/zvk-invalid-features.c
@@ -0,0 +1,48 @@
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 %s -fsyntax-only -verify
+
+void test_zvk_features() {
+  // zvbb
+  __riscv_vbrev(); // expected-error {{call to undeclared function '__riscv_vbrev'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vclz(); // expected-error {{call to undeclared function '__riscv_vclz'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vctz(); // expected-error {{call to undeclared function '__riscv_vctz'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vcpopv(); // expected-error {{call to undeclared function '__riscv_vcpopv'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vwsll(); // expected-error {{call to undeclared function '__riscv_vwsll'; ISO C99 and later do not support implicit function declarations}}
+
+  // zvbc
+  __riscv_vclmul(); // expected-error {{call to undeclared function '__riscv_vclmul'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vclmulh(); // expected-error {{call to undeclared function '__riscv_vclmulh'; ISO C99 and later do not support implicit function declarations}}
+
+  // zvkb
+  __riscv_vandn(); // expected-error {{call to undeclared function '__riscv_vandn'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vbrev8(); // expected-error {{call to undeclared function '__riscv_vbrev8'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vrev8(); // expected-error {{call to undeclared function '__riscv_vrev8'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vrol(); // expected-error {{call to undeclared function '__riscv_vrol'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vror(); // expected-error {{call to undeclared function '__riscv_vror'; ISO C99 and later do not support implicit function declarations}}
+
+  // zvkg
+  __riscv_vghsh(); // expected-error {{call to undeclared function '__riscv_vghsh'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vgmul(); // expected-error {{call to undeclared function '__riscv_vgmul'; ISO C99 and later do not support implicit function declarations}}
+
+  // zvkned
+  __riscv_vaesdf(); // expected-error {{call to undeclared function '__riscv_vaesdf'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vaesdm(); // expected-error {{call to undeclared function '__riscv_vaesdm'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vaesef(); // expected-error {{call to undeclared function '__riscv_vaesef'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vaesem(); // expected-error {{call to undeclared function '__riscv_vaesem'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vaeskf1(); // expected-error {{call to undeclared function '__riscv_vaeskf1'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vaeskf2(); // expected-error {{call to undeclared function '__riscv_vaeskf2'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vaesz(); // expected-error {{call to undeclared function '__riscv_vaesz'; ISO C99 and later do not support implicit function declarations}}
+
+  // zvknha or zvknhb
+  __riscv_vsha2ch(); // expected-error {{call to undeclared function '__riscv_vsha2ch'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vsha2cl(); // expected-error {{call to undeclared function '__riscv_vsha2cl'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vsha2ms(); // expected-error {{call to undeclared function '__riscv_vsha2ms'; ISO C99 and later do not support implicit function declarations}}
+
+  //zvksed
+  __riscv_vsm4k(); // expected-error {{call to undeclared function '__riscv_vsm4k'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vsm4r(); // expected-error {{call to undeclared function '__riscv_vsm4r'; ISO C99 and later do not support implicit function declarations}}
+
+  // zvksh
+  __riscv_vsm3c(); // expected-error {{call to undeclared function '__riscv_vsm3c'; ISO C99 and later do not support implicit function declarations}}
+  __riscv_vsm3me(); // expected-error {{call to undeclared function '__riscv_vsm3me'; ISO C99 and later do not support implicit function declarations}}
+}

diff  --git a/clang/test/Sema/zvk-invalid.c b/clang/test/Sema/zvk-invalid-vlen.c
similarity index 87%
rename from clang/test/Sema/zvk-invalid.c
rename to clang/test/Sema/zvk-invalid-vlen.c
index 13e505d5201b52..a737d620e7aa6e 100644
--- a/clang/test/Sema/zvk-invalid.c
+++ b/clang/test/Sema/zvk-invalid-vlen.c
@@ -1,5 +1,6 @@
 // REQUIRES: riscv-registered-target
-// RUN: %clang_cc1 -triple riscv64 -target-feature +v %s -fsyntax-only -verify
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +experimental-zvkned \
+// RUN:   -target-feature +experimental-zvksh %s -fsyntax-only -verify
 
 #include <riscv_vector.h>
 

diff  --git a/clang/utils/TableGen/RISCVVEmitter.cpp b/clang/utils/TableGen/RISCVVEmitter.cpp
index 8acd1d15649bec..d2c3d70ac1f012 100644
--- a/clang/utils/TableGen/RISCVVEmitter.cpp
+++ b/clang/utils/TableGen/RISCVVEmitter.cpp
@@ -655,6 +655,14 @@ void RVVEmitter::createRVVIntrinsics(
                                   .Case("RV64", RVV_REQ_RV64)
                                   .Case("ZvfhminOrZvfh", RVV_REQ_ZvfhminOrZvfh)
                                   .Case("Xsfvcp", RVV_REQ_Xsfvcp)
+                                  .Case("Zvbb", RVV_REQ_Zvbb)
+                                  .Case("Zvbc", RVV_REQ_Zvbc)
+                                  .Case("Zvkb", RVV_REQ_Zvkb)
+                                  .Case("Zvkg", RVV_REQ_Zvkg)
+                                  .Case("Zvkned", RVV_REQ_Zvkned)
+                                  .Case("Zvknha", RVV_REQ_Zvknha)
+                                  .Case("Zvksed", RVV_REQ_Zvksed)
+                                  .Case("Zvksh", RVV_REQ_Zvksh)
                                   .Default(RVV_REQ_None);
       assert(RequireExt != RVV_REQ_None && "Unrecognized required feature?");
       SR.RequiredExtensions |= RequireExt;


        


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