[PATCH] D157547: Arm64EC entry/exit thunks, consolidated.

[Eli Friedman via Phabricator via cfe-commits]

efriedma added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64CallingConvention.td:555-557
+def CSR_Win_AArch64_Arm64EC_Thunk : CalleeSavedRegs<(add X19, X20, X21, X22, X23, X24,
+                                                         X25, X26, X27, X28, FP, LR,
+                                                         (sequence "Q%u", 6, 15))>;
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dpaoliello wrote:
> I've been hitting asserts in `computeCalleeSaveRegisterPairs` due to this: LLVM doesn't support gaps when saving registers for Windows (~line 2744 of AArch64FrameLowering.cpp), so placing the smaller registers before the larger ones causes issues if those smaller ones aren't paired (the `assert(OffsetPre % Scale == 0);` fires since `OffsetPre` will be a multiple of 8 but `Scale` will be 16).
That looks right; I thought I had that fix in here, but I guess I mixed up my patches and pulled in a different version.

(I'll reply to the other review comments in more detail soon.)


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D157547/new/

https://reviews.llvm.org/D157547