[PATCH] D142144: [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Aug 21 08:56:44 PDT 2023
craig.topper added inline comments.
================
Comment at: clang/test/Driver/riscv-rvv-vector-bits.c:43
+// RUN: %clang -c %s -### --target=riscv64-linux-gnu -march=rv64gcv \
+// RUN: -mrvv-vector-bits=64 2>&1 | FileCheck --check-prefix=CHECK-BAD-VALUE-ERROR %s
+
----------------
wangpc wrote:
> Why isn't 64 an valid value?
Because the command line contains āvā, zvl128b is implied. So rvv-vector-bits must be at least 128.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D142144/new/
https://reviews.llvm.org/D142144
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