[PATCH] D156799: Update generic scheduling to use A510 scheduling model

harvin iriawan via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Aug 21 03:08:25 PDT 2023 

harviniriawan updated this revision to Diff 551951.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156799/new/

https://reviews.llvm.org/D156799

Files:
  clang/test/CodeGen/aarch64-ABI-align-packed-assembly.c
  llvm/lib/Target/AArch64/AArch64.td
  llvm/test/Analysis/CostModel/AArch64/vector-select.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2_lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lse2.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-lse2_lse128.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-outline_atomics.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-rcpc.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-rcpc3.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8_1a.ll
  llvm/test/CodeGen/AArch64/Atomics/aarch64_be-atomicrmw-v8a.ll
  llvm/test/CodeGen/AArch64/GlobalISel/aapcs_vararg_frame.ll
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
  llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll
  llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll
  llvm/test/CodeGen/AArch64/GlobalISel/select-bitfield-insert.ll
  llvm/test/CodeGen/AArch64/GlobalISel/stacksave-stackrestore.ll
  llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll
  llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll
  llvm/test/CodeGen/AArch64/a57-csel.ll
  llvm/test/CodeGen/AArch64/aarch64-addv.ll
  llvm/test/CodeGen/AArch64/aarch64-be-bv.ll
  llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
  llvm/test/CodeGen/AArch64/aarch64-combine-add-sub-mul.ll
  llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll
  llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll
  llvm/test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
  llvm/test/CodeGen/AArch64/aarch64-fixup-statepoint-regs-crash.ll
  llvm/test/CodeGen/AArch64/aarch64-fold-lslfast.ll
  llvm/test/CodeGen/AArch64/aarch64-interleaved-access-w-undef.ll
  llvm/test/CodeGen/AArch64/aarch64-isel-csinc.ll
  llvm/test/CodeGen/AArch64/aarch64-load-ext.ll
  llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
  llvm/test/CodeGen/AArch64/aarch64-mops-consecutive.ll
  llvm/test/CodeGen/AArch64/aarch64-mops.ll
  llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll
  llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
  llvm/test/CodeGen/AArch64/aarch64-pmull2.ll
  llvm/test/CodeGen/AArch64/aarch64-smull.ll
  llvm/test/CodeGen/AArch64/aarch64-uzp1-combine.ll
  llvm/test/CodeGen/AArch64/aarch64-wide-mul.ll
  llvm/test/CodeGen/AArch64/aarch64_fnmadd.ll
  llvm/test/CodeGen/AArch64/aarch64_win64cc_vararg.ll
  llvm/test/CodeGen/AArch64/abd-combine.ll
  llvm/test/CodeGen/AArch64/active_lane_mask.ll
  llvm/test/CodeGen/AArch64/add-extract.ll
  llvm/test/CodeGen/AArch64/addcarry-crash.ll
  llvm/test/CodeGen/AArch64/addsub-constant-folding.ll
  llvm/test/CodeGen/AArch64/addsub.ll
  llvm/test/CodeGen/AArch64/align-down.ll
  llvm/test/CodeGen/AArch64/and-mask-removal.ll
  llvm/test/CodeGen/AArch64/andorbrcompare.ll
  llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll
  llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll
  llvm/test/CodeGen/AArch64/arm64-addr-type-promotion.ll
  llvm/test/CodeGen/AArch64/arm64-addrmode.ll
  llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
  llvm/test/CodeGen/AArch64/arm64-convert-v4f64.ll
  llvm/test/CodeGen/AArch64/arm64-cse.ll
  llvm/test/CodeGen/AArch64/arm64-csel.ll
  llvm/test/CodeGen/AArch64/arm64-dup.ll
  llvm/test/CodeGen/AArch64/arm64-fcopysign.ll
  llvm/test/CodeGen/AArch64/arm64-fmadd.ll
  llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-no-helper.ll
  llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
  llvm/test/CodeGen/AArch64/arm64-inline-asm.ll
  llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll
  llvm/test/CodeGen/AArch64/arm64-ld1.ll
  llvm/test/CodeGen/AArch64/arm64-ldp.ll
  llvm/test/CodeGen/AArch64/arm64-misaligned-memcpy-inline.ll
  llvm/test/CodeGen/AArch64/arm64-mul.ll
  llvm/test/CodeGen/AArch64/arm64-neon-3vdiff.ll
  llvm/test/CodeGen/AArch64/arm64-neon-mul-div.ll
  llvm/test/CodeGen/AArch64/arm64-neon-v8.1a.ll
  llvm/test/CodeGen/AArch64/arm64-non-pow2-ldst.ll
  llvm/test/CodeGen/AArch64/arm64-nvcast.ll
  llvm/test/CodeGen/AArch64/arm64-promote-const-complex-initializers.ll
  llvm/test/CodeGen/AArch64/arm64-register-pairing.ll
  llvm/test/CodeGen/AArch64/arm64-rev.ll
  llvm/test/CodeGen/AArch64/arm64-setcc-int-to-fp-combine.ll
  llvm/test/CodeGen/AArch64/arm64-setcc-swap-infloop.ll
  llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
  llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
  llvm/test/CodeGen/AArch64/arm64-tbl.ll
  llvm/test/CodeGen/AArch64/arm64-vabs.ll
  llvm/test/CodeGen/AArch64/arm64-vector-ldst.ll
  llvm/test/CodeGen/AArch64/arm64-vhadd.ll
  llvm/test/CodeGen/AArch64/arm64-vmul.ll
  llvm/test/CodeGen/AArch64/arm64-vshift.ll
  llvm/test/CodeGen/AArch64/arm64-xaluo.ll
  llvm/test/CodeGen/AArch64/arm64-zip.ll
  llvm/test/CodeGen/AArch64/arm64_32-addrs.ll
  llvm/test/CodeGen/AArch64/arm64_32.ll
  llvm/test/CodeGen/AArch64/arm64ec-reservedregs.ll
  llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
  llvm/test/CodeGen/AArch64/atomic-ops-msvc.ll
  llvm/test/CodeGen/AArch64/atomic-ops.ll
  llvm/test/CodeGen/AArch64/bcmp-inline-small.ll
  llvm/test/CodeGen/AArch64/bcmp.ll
  llvm/test/CodeGen/AArch64/bf16-shuffle.ll
  llvm/test/CodeGen/AArch64/bfis-in-loop.ll
  llvm/test/CodeGen/AArch64/bitfield-insert.ll
  llvm/test/CodeGen/AArch64/bool-ext-inc.ll
  llvm/test/CodeGen/AArch64/branch-relax-alignment.ll
  llvm/test/CodeGen/AArch64/branch-relax-bcc.ll
  llvm/test/CodeGen/AArch64/build-one-lane.ll
  llvm/test/CodeGen/AArch64/build-vector-to-extract-subvec-crash.ll
  llvm/test/CodeGen/AArch64/build-vector-two-dup.ll
  llvm/test/CodeGen/AArch64/cgp-usubo.ll
  llvm/test/CodeGen/AArch64/cmp-chains.ll
  llvm/test/CodeGen/AArch64/cmp-select-sign.ll
  llvm/test/CodeGen/AArch64/cmpxchg-idioms.ll
  llvm/test/CodeGen/AArch64/combine-andintoload.ll
  llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-contract.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-fast.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-scalable-contract.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-scalable-fast.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-add-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-add.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-add-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-add.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-i16-add-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-i16-mul-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-i32-add-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-i32-mul-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-i64-add-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-i64-mul-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-i8-add-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-mixed-cases.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-multiuses.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-predicated-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-splat-scalable.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-splat.ll
  llvm/test/CodeGen/AArch64/complex-deinterleaving-uniform-cases.ll
  llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
  llvm/test/CodeGen/AArch64/cond-br-tuning.ll
  llvm/test/CodeGen/AArch64/consthoist-gep.ll
  llvm/test/CodeGen/AArch64/copyprop.ll
  llvm/test/CodeGen/AArch64/ctpop-nonean.ll
  llvm/test/CodeGen/AArch64/dag-combine-concat-vectors.ll
  llvm/test/CodeGen/AArch64/dag-combine-select.ll
  llvm/test/CodeGen/AArch64/dag-combine-setcc.ll
  llvm/test/CodeGen/AArch64/dag-numsignbits.ll
  llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-signed.ll
  llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-unsigned.ll
  llvm/test/CodeGen/AArch64/double_reduct.ll
  llvm/test/CodeGen/AArch64/expand-select.ll
  llvm/test/CodeGen/AArch64/expand-vector-rot.ll
  llvm/test/CodeGen/AArch64/extbinopload.ll
  llvm/test/CodeGen/AArch64/extend_inreg_of_concat_subvectors.ll
  llvm/test/CodeGen/AArch64/extract-bits.ll
  llvm/test/CodeGen/AArch64/extract-lowbits.ll
  llvm/test/CodeGen/AArch64/f16-instructions.ll
  llvm/test/CodeGen/AArch64/fabs.ll
  llvm/test/CodeGen/AArch64/fadd-combines.ll
  llvm/test/CodeGen/AArch64/faddp-half.ll
  llvm/test/CodeGen/AArch64/faddp.ll
  llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll
  llvm/test/CodeGen/AArch64/fast-isel-gep.ll
  llvm/test/CodeGen/AArch64/fast-isel-memcpy.ll
  llvm/test/CodeGen/AArch64/fast-isel-shift.ll
  llvm/test/CodeGen/AArch64/fcopysign.ll
  llvm/test/CodeGen/AArch64/fcvt.ll
  llvm/test/CodeGen/AArch64/fcvt_combine.ll
  llvm/test/CodeGen/AArch64/fdiv-combine.ll
  llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
  llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
  llvm/test/CodeGen/AArch64/flags-multiuse.ll
  llvm/test/CodeGen/AArch64/fmaximum-legalization.ll
  llvm/test/CodeGen/AArch64/fminimummaximum.ll
  llvm/test/CodeGen/AArch64/fminmax.ll
  llvm/test/CodeGen/AArch64/fmlal-loreg.ll
  llvm/test/CodeGen/AArch64/fold-csel-cttz-and.ll
  llvm/test/CodeGen/AArch64/fp-conversion-to-tbl.ll
  llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
  llvm/test/CodeGen/AArch64/fp16-v16-instructions.ll
  llvm/test/CodeGen/AArch64/fp16-v8-instructions.ll
  llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
  llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
  llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
  llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
  llvm/test/CodeGen/AArch64/fptrunc.ll
  llvm/test/CodeGen/AArch64/fsqrt.ll
  llvm/test/CodeGen/AArch64/funnel-shift-rot.ll
  llvm/test/CodeGen/AArch64/funnel-shift.ll
  llvm/test/CodeGen/AArch64/global-merge-3.ll
  llvm/test/CodeGen/AArch64/gpr_cttz.ll
  llvm/test/CodeGen/AArch64/half.ll
  llvm/test/CodeGen/AArch64/highextractbitcast.ll
  llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
  llvm/test/CodeGen/AArch64/i128-math.ll
  llvm/test/CodeGen/AArch64/i128_volatile_load_store.ll
  llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
  llvm/test/CodeGen/AArch64/insert-extend.ll
  llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
  llvm/test/CodeGen/AArch64/insert-subvector.ll
  llvm/test/CodeGen/AArch64/insertshuffleload.ll
  llvm/test/CodeGen/AArch64/isinf.ll
  llvm/test/CodeGen/AArch64/known-never-nan.ll
  llvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll
  llvm/test/CodeGen/AArch64/load-insert-zero.ll
  llvm/test/CodeGen/AArch64/logic-reassociate.ll
  llvm/test/CodeGen/AArch64/logic-shift.ll
  llvm/test/CodeGen/AArch64/logical_shifted_reg.ll
  llvm/test/CodeGen/AArch64/lowerMUL-newload.ll
  llvm/test/CodeGen/AArch64/machine-combiner-copy.ll
  llvm/test/CodeGen/AArch64/machine-combiner-subadd.ll
  llvm/test/CodeGen/AArch64/machine-combiner-transient.ll
  llvm/test/CodeGen/AArch64/machine-licm-sink-instr.ll
  llvm/test/CodeGen/AArch64/machine-licm-sub-loop.ll
  llvm/test/CodeGen/AArch64/machine_cse_impdef_killflags.ll
  llvm/test/CodeGen/AArch64/madd-combiner.ll
  llvm/test/CodeGen/AArch64/memcpy-scoped-aa.ll
  llvm/test/CodeGen/AArch64/merge-trunc-store.ll
  llvm/test/CodeGen/AArch64/midpoint-int.ll
  llvm/test/CodeGen/AArch64/minmax-of-minmax.ll
  llvm/test/CodeGen/AArch64/minmax.ll
  llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
  llvm/test/CodeGen/AArch64/misched-fusion-lit.ll
  llvm/test/CodeGen/AArch64/mul_pow2.ll
  llvm/test/CodeGen/AArch64/mulcmle.ll
  llvm/test/CodeGen/AArch64/named-vector-shuffles-neon.ll
  llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll
  llvm/test/CodeGen/AArch64/neg-imm.ll
  llvm/test/CodeGen/AArch64/neon-abd.ll
  llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
  llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
  llvm/test/CodeGen/AArch64/neon-dotpattern.ll
  llvm/test/CodeGen/AArch64/neon-dotreduce.ll
  llvm/test/CodeGen/AArch64/neon-extadd.ll
  llvm/test/CodeGen/AArch64/neon-extracttruncate.ll
  llvm/test/CodeGen/AArch64/neon-mov.ll
  (344 more files...)

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