[PATCH] D157485: [X86][RFC] Support new feature AVX10

[Kan Shengchen via Phabricator via cfe-commits]

skan added inline comments.


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:927
+      !STI.hasFeature(X86::FeatureAVX10_512bit))
+    report_fatal_error("ZMM registers are not supported without AVX10-512BIT");
   switch (TSFlags & X86II::OpPrefixMask) {
----------------
skan wrote:
> -mavx10.1 does not work for assembler. So if such instruction is generated w/o AVX10-512BIT support, it must be compiler's issue instead of user's. An `assert` should be more appropriate here.
> -mavx10.1 does not work for assembler. So if such instruction is generated w/o AVX10-512BIT support, it must be compiler's issue instead of user's. An `assert` should be more appropriate here.

Reference: https://llvm.org/docs/CodingStandards.html#assert-liberally


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D157485/new/

https://reviews.llvm.org/D157485