[clang] 23ce536 - [RISCV] Support -m[no-]strict-align options
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Thu Aug 3 03:13:03 PDT 2023
Author: wangpc
Date: 2023-08-03T18:11:41+08:00
New Revision: 23ce5368409c760f3dd49d0f17f34772b0b869d8
URL: https://github.com/llvm/llvm-project/commit/23ce5368409c760f3dd49d0f17f34772b0b869d8
DIFF: https://github.com/llvm/llvm-project/commit/23ce5368409c760f3dd49d0f17f34772b0b869d8.diff
LOG: [RISCV] Support -m[no-]strict-align options
To match GCC.
Options `-m[no-]strict-align` are aliases of `-m[no-]unaligned-access`
in clang, but there is no corresponding option in GCC.
Support of `-m[no-]unaligned-access` in GCC may be needed to align
Clang/GCC.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D155456
Added:
Modified:
clang/docs/ReleaseNotes.rst
clang/include/clang/Driver/Options.td
clang/lib/Driver/ToolChains/Arch/RISCV.cpp
clang/test/Driver/riscv-default-features.c
clang/test/Driver/riscv-features.c
Removed:
################################################################################
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 627a1541cfddb9..da3cb85dce8e76 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -171,6 +171,8 @@ LoongArch Support
RISC-V Support
^^^^^^^^^^^^^^
+- Unaligned memory accesses can be toggled by ``-m[no-]unaligned-access`` or the
+ aliases ``-m[no-]strict-align``.
CUDA/HIP Language Changes
^^^^^^^^^^^^^^^^^^^^^^^^^
diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td
index 296fa1fcc38a02..ebf7e0c9f39979 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3834,9 +3834,9 @@ def mrvv_vector_bits_EQ : Joined<["-"], "mrvv-vector-bits=">, Group<m_Group>,
"in __riscv_v_fixed_vlen preprocessor define (RISC-V only)">;
def munaligned_access : Flag<["-"], "munaligned-access">, Group<m_Group>,
- HelpText<"Allow memory accesses to be unaligned (AArch32/AArch64/LoongArch only)">;
+ HelpText<"Allow memory accesses to be unaligned (AArch32/AArch64/LoongArch/RISC-V only)">;
def mno_unaligned_access : Flag<["-"], "mno-unaligned-access">, Group<m_Group>,
- HelpText<"Force all memory accesses to be aligned (AArch32/AArch64/LoongArch only)">;
+ HelpText<"Force all memory accesses to be aligned (AArch32/AArch64/LoongArch/RISC-V only)">;
} // let Flags = [TargetSpecific]
def mstrict_align : Flag<["-"], "mstrict-align">, Alias<mno_unaligned_access>, Flags<[CC1Option,HelpHidden]>,
HelpText<"Force all memory accesses to be aligned (same as mno-unaligned-access)">;
diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
index 17e1aab961e5a8..91a5589c363c49 100644
--- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -167,6 +167,19 @@ void riscv::getRISCVTargetFeatures(const Driver &D, const llvm::Triple &Triple,
else
Features.push_back("-save-restore");
+ // -mno-unaligned-access is default, unless -munaligned-access is specified.
+ bool HasV = llvm::is_contained(Features, "+zve32x");
+ if (Args.hasFlag(options::OPT_munaligned_access,
+ options::OPT_mno_unaligned_access, false)) {
+ Features.push_back("+unaligned-scalar-mem");
+ if (HasV)
+ Features.push_back("+unaligned-vector-mem");
+ } else {
+ Features.push_back("-unaligned-scalar-mem");
+ if (HasV)
+ Features.push_back("-unaligned-vector-mem");
+ }
+
// Now add any that the user explicitly requested on the command line,
// which may override the defaults.
handleTargetFeaturesGroup(D, Triple, Args, Features,
diff --git a/clang/test/Driver/riscv-default-features.c b/clang/test/Driver/riscv-default-features.c
index 6e48f7cc37dcb0..9e7d119d0e2690 100644
--- a/clang/test/Driver/riscv-default-features.c
+++ b/clang/test/Driver/riscv-default-features.c
@@ -3,8 +3,10 @@
// RV32: "target-features"="+32bit,+a,+c,+m,+relax,
// RV32-SAME: -save-restore
+// RV32-SAME: -unaligned-scalar-mem
// RV64: "target-features"="+64bit,+a,+c,+m,+relax,
// RV64-SAME: -save-restore
+// RV64-SAME: -unaligned-scalar-mem
// Dummy function
int foo(void){
diff --git a/clang/test/Driver/riscv-features.c b/clang/test/Driver/riscv-features.c
index f67dd3d46402ba..bb9b4f37e222a1 100644
--- a/clang/test/Driver/riscv-features.c
+++ b/clang/test/Driver/riscv-features.c
@@ -26,6 +26,22 @@
// DEFAULT: "-target-feature" "-save-restore"
// DEFAULT-NOT: "-target-feature" "+save-restore"
+// RUN: %clang --target=riscv32-unknown-elf -### %s -munaligned-access 2>&1 | FileCheck %s -check-prefix=UNALIGNED-SCALAR-MEM
+// RUN: %clang --target=riscv32-unknown-elf -### %s -mno-unaligned-access 2>&1 | FileCheck %s -check-prefix=NO-UNALIGNED-SCALAR-MEM
+// RUN: %clang --target=riscv32-unknown-elf -### %s -mno-strict-align 2>&1 | FileCheck %s -check-prefix=UNALIGNED-SCALAR-MEM
+// RUN: %clang --target=riscv32-unknown-elf -### %s -mstrict-align 2>&1 | FileCheck %s -check-prefix=NO-UNALIGNED-SCALAR-MEM
+// RUN: %clang --target=riscv32-unknown-elf -### %s -march=rv32gv -munaligned-access 2>&1 | FileCheck %s -check-prefix=UNALIGNED-VECTOR-MEM
+// RUN: %clang --target=riscv32-unknown-elf -### %s -march=rv32gv -mno-unaligned-access 2>&1 | FileCheck %s -check-prefix=NO-UNALIGNED-VECTOR-MEM
+// RUN: %clang --target=riscv32-unknown-elf -### %s -march=rv32gv -mno-strict-align 2>&1 | FileCheck %s -check-prefix=UNALIGNED-VECTOR-MEM
+// RUN: %clang --target=riscv32-unknown-elf -### %s -march=rv32gv -mstrict-align 2>&1 | FileCheck %s -check-prefix=NO-UNALIGNED-VECTOR-MEM
+
+// UNALIGNED-SCALAR-MEM: "-target-feature" "+unaligned-scalar-mem"
+// NO-UNALIGNED-SCALAR-MEM: "-target-feature" "-unaligned-scalar-mem"
+// UNALIGNED-VECTOR-MEM: "-target-feature" "+unaligned-vector-mem"
+// NO-UNALIGNED-VECTOR-MEM: "-target-feature" "-unaligned-vector-mem"
+// DEFAULT: "-target-feature" "-unaligned-scalar-mem"
+// DEFAULT-NOT: "-target-feature" "+unaligned-scalar-mem"
+
// RUN: %clang --target=riscv32-linux -### %s -fsyntax-only 2>&1 \
// RUN: | FileCheck %s -check-prefix=DEFAULT-LINUX
// RUN: %clang --target=riscv64-linux -### %s -fsyntax-only 2>&1 \
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