[PATCH] D138810: [RISCV] Support vector crypto extension C intrinsics

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: clang/lib/Sema/SemaChecking.cpp:4576
+  case RISCVVector::BI__builtin_rvv_vaeskf1_vi_ta:
+  case RISCVVector::BI__builtin_rvv_vsm4k_vi_ta:
+    return SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
----------------
craig.topper wrote:
> craig.topper wrote:
> > eopXD wrote:
> > > Valid range of `vaeskf1`, `vaeskf2` seems to be 0 to 15. [0]
> > > Valid range of `vsm4k` seems to be 0 to 7 [1].
> > > 
> > > 
> > > 
> > > [0] https://github.com/riscv/riscv-crypto/blob/master/doc/vector/insns/vaeskf1.adoc 
> > > [1] https://github.com/riscv/riscv-crypto/blob/master/doc/vector/insns/vsm4k.adoc
> > I think the field in the instruction is 5 bits, but vaeskf1 and vaeskf2 ignore bit 4. The true valid range is 1-10. The other values are aliased to one of the valid values. Should the intrinsic interface expose all 32 possible values or just 1-10?
> 1-10 is the valid range for vaeskf1. vaeskf2 is 2-14.
Let's leave it 0-31 for now and maybe start a conversation on crypto or intrinsic github.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D138810/new/

https://reviews.llvm.org/D138810