[PATCH] D154596: [RISCV] Fix required features checking with empty string

Jim Lin via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Jul 13 22:37:30 PDT 2023


Jim added a comment.

In D154596#4499757 <https://reviews.llvm.org/D154596#4499757>, @wangpc wrote:

> In D154596#4499718 <https://reviews.llvm.org/D154596#4499718>, @Jim wrote:
>
>> In D154596#4499647 <https://reviews.llvm.org/D154596#4499647>, @wangpc wrote:
>>
>>> Can you give an example of intrinsic that doesn't require any extra extension enabled?
>>
>> Like read/write csr intrinsics that we add for convenient usage doesn't need any extra extension enabled.
>
> It seems that `zicsr` is related.
> I am not opposed to this change, just out of curiosity. :-)

read/write csr is not a good example for the newest isa spec. In older isa spec 2.2, it is included in base i extension.
Anyway. just want to add some intrinsics and them generate corresponding instruction that is in base i extension.
And it is reasonable if keep required feature string empty should imply no features/extensions required.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154596/new/

https://reviews.llvm.org/D154596



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