[PATCH] D155147: Add SM3 instructions.

[Kan Shengchen via Phabricator via cfe-commits]

skan added inline comments.


================
Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8331
+                VR128:$src2, (loadv4i32 addr:$src3), timm:$src4))]>,
+              Sched<[WriteVecIMul]>;
+  }
----------------
Is the schedule appropriate?


================
Comment at: llvm/test/MC/Disassembler/X86/sm3-32.txt:3
+# RUN: llvm-mc --disassemble %s -triple=i386-unknown-unknown | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=i386-unknown-unknown -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
----------------
Drop -x86-asm-syntax=intel


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155147/new/

https://reviews.llvm.org/D155147