[PATCH] D155148: Add SM4 instructions.

[Kan Shengchen via Phabricator via cfe-commits]

skan added inline comments.


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Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8308
+                RC:$src2))]>,
+              Sched<[WriteVecIMul]>;
+    def rm : I<0xda, MRMSrcMem, (outs RC:$dst),
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>From the description, it seems that `WriteVecIMul` is not the right schedule?


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Comment at: llvm/test/MC/Disassembler/X86/sm4-64.txt:4
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
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Remove -x86-asm-syntax=intel


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155148/new/

https://reviews.llvm.org/D155148