[clang] 2df12f3 - [ARM][AArch64] Make ACLE __clzl/__clzll return unsigned int instead of unsigned long/uint64_t.

[Craig Topper via cfe-commits]

Author: Craig Topper
Date: 2023-07-11T10:42:25-07:00
New Revision: 2df12f30551e0cb9ecfd49a0cacf929e785c15da

URL: https://github.com/llvm/llvm-project/commit/2df12f30551e0cb9ecfd49a0cacf929e785c15da
DIFF: https://github.com/llvm/llvm-project/commit/2df12f30551e0cb9ecfd49a0cacf929e785c15da.diff

LOG: [ARM][AArch64] Make ACLE __clzl/__clzll return unsigned int instead of unsigned long/uint64_t.

Use unsigned long in place of uint32_t for both clz and cls.

As far as I can tell this matches what ACLE defines and what gcc implements.

Noticed while investigating fixing https://github.com/llvm/llvm-project/issues/63113

Reviewed By: tmatheson

Differential Revision: https://reviews.llvm.org/D154910

Added: 
    

Modified: 
    clang/lib/Headers/arm_acle.h
    clang/test/CodeGen/arm_acle.c

Removed: 
    


################################################################################
diff  --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index e086f1f02dad0c..382487f1283e4d 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -138,28 +138,28 @@ __rorl(unsigned long __x, uint32_t __y) {
 
 
 /* CLZ */
-static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
 __clz(uint32_t __t) {
-  return (uint32_t)__builtin_clz(__t);
+  return (unsigned int)__builtin_clz(__t);
 }
 
-static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
 __clzl(unsigned long __t) {
-  return (unsigned long)__builtin_clzl(__t);
+  return (unsigned int)__builtin_clzl(__t);
 }
 
-static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
 __clzll(uint64_t __t) {
-  return (uint64_t)__builtin_clzll(__t);
+  return (unsigned int)__builtin_clzll(__t);
 }
 
 /* CLS */
-static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
 __cls(uint32_t __t) {
   return __builtin_arm_cls(__t);
 }
 
-static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
 __clsl(unsigned long __t) {
 #if __SIZEOF_LONG__ == 4
   return __builtin_arm_cls(__t);
@@ -168,7 +168,7 @@ __clsl(unsigned long __t) {
 #endif
 }
 
-static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
+static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__))
 __clsll(uint64_t __t) {
   return __builtin_arm_cls64(__t);
 }

diff  --git a/clang/test/CodeGen/arm_acle.c b/clang/test/CodeGen/arm_acle.c
index f21bc5c1c5b0e9..b1105a1d5aabb6 100644
--- a/clang/test/CodeGen/arm_acle.c
+++ b/clang/test/CodeGen/arm_acle.c
@@ -332,7 +332,7 @@ uint64_t test_rorll(uint64_t x, uint32_t y) {
 // ARM-NEXT:    [[TMP0:%.*]] = call i32 @llvm.ctlz.i32(i32 [[T:%.*]], i1 false)
 // ARM-NEXT:    ret i32 [[TMP0]]
 //
-uint32_t test_clz(uint32_t t) {
+unsigned test_clz(uint32_t t) {
   return __clz(t);
 }
 
@@ -345,10 +345,9 @@ uint32_t test_clz(uint32_t t) {
 // AArch64-NEXT:  entry:
 // AArch64-NEXT:    [[TMP0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[T:%.*]], i1 false)
 // AArch64-NEXT:    [[CAST_I:%.*]] = trunc i64 [[TMP0]] to i32
-// AArch64-NEXT:    [[CONV_I:%.*]] = sext i32 [[CAST_I]] to i64
-// AArch64-NEXT:    ret i64 [[CONV_I]]
+// AArch64-NEXT:    ret i32 [[CAST_I]]
 //
-long test_clzl(long t) {
+unsigned test_clzl(unsigned long t) {
   return __clzl(t);
 }
 
@@ -356,10 +355,9 @@ long test_clzl(long t) {
 // ARM-NEXT:  entry:
 // ARM-NEXT:    [[TMP0:%.*]] = call i64 @llvm.ctlz.i64(i64 [[T:%.*]], i1 false)
 // ARM-NEXT:    [[CAST_I:%.*]] = trunc i64 [[TMP0]] to i32
-// ARM-NEXT:    [[CONV_I:%.*]] = sext i32 [[CAST_I]] to i64
-// ARM-NEXT:    ret i64 [[CONV_I]]
+// ARM-NEXT:    ret i32 [[CAST_I]]
 //
-uint64_t test_clzll(uint64_t t) {
+unsigned test_clzll(uint64_t t) {
   return __clzll(t);
 }