[PATCH] D154631: [3/8][RISCV] Add rounding mode control variant for vfmul, vfdiv, vfrdiv, vfwmul

[Craig Topper via Phabricator via cfe-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: clang/lib/Sema/SemaChecking.cpp:4824
   case RISCVVector::BI__builtin_rvv_vfwsub_wf_rm_ta:
+  case RISCVVector::BI__builtin_rvv_vfmul_vv_rm_ta:
+  case RISCVVector::BI__builtin_rvv_vfmul_vf_rm_ta:
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This needs to be rebased


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D154631/new/

https://reviews.llvm.org/D154631