[PATCH] D154647: [RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types.

Craig Topper via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Jul 6 12:55:53 PDT 2023


craig.topper created this revision.
craig.topper added reviewers: asb, VincentWu, kito-cheng, reames.
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Previously we returned i32 on RV32 and i64 on RV64. The instructions
only consume 32 bits and only produce 32 bits. For RV64, the result
is sign extended to 64 bits like *W instructions.

This patch removes this detail from the interface to improve
portability and consistency. This matches the proposal for scalar
intrinsics here https://github.com/riscv-non-isa/riscv-c-api-doc/pull/44

I've included IR autoupgrade support as well.

I'll be doing this for other builtins/intrinsics that currently use
'long' in other patches.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154647

Files:
  clang/include/clang/Basic/BuiltinsRISCV.def
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zknh.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zksed.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv32-zksh.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zknh.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zksed.c
  clang/test/CodeGen/RISCV/rvk-intrinsics/riscv64-zksh.c
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/IR/AutoUpgrade.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoZk.td
  llvm/test/CodeGen/RISCV/rv32zknh-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv32zksed-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv32zksh-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zknh-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zksed-intrinsic.ll
  llvm/test/CodeGen/RISCV/rv64zksh-intrinsic.ll
  llvm/test/CodeGen/RISCV/sextw-removal.ll

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