[PATCH] D154628: [1/8][RISCV] Add rounding mode control variant for vfsub, vfrsub
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Jul 6 11:57:25 PDT 2023
craig.topper added inline comments.
================
Comment at: clang/lib/Sema/SemaChecking.cpp:4811
return SemaBuiltinConstantArgRange(TheCall, 4, 0, 3);
case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_ta:
case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_ta:
----------------
Not related to this patch, but why do the builtins end in _ta when the C intrinsics don't?
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:5916
//===----------------------------------------------------------------------===//
-let mayRaiseFPException = true in {
+let mayRaiseFPException = true, hasSideEffects = 0 in {
defm PseudoVFADD : VPseudoVALU_VV_VF_RM;
----------------
Why do we need `hasSideEffects = 0` now? We didn't have it before.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D154628/new/
https://reviews.llvm.org/D154628
More information about the cfe-commits
mailing list