[PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)

[Brandon Wu via Phabricator via cfe-commits]

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This is the vector calling convention based on
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/389,
the idea is to split between "scalar" callee-saved registers
and "vector" callee-saved registers. "scalar" ones remain the
original strategy, however, "vector" ones are handled together
with RVV objects.

The stack layout would be:

  |--------------------------| <-- FP
  | callee-allocated save    |
  | area for register varargs|
  |--------------------------|
  | callee-saved registers   | <-- scalar callee-saved
  |        (scalar)          |
  |--------------------------|
  | RVV alignment padding    |
  |--------------------------|
  | callee-saved registers   | <-- vector callee-saved
  |        (vector)          |
  |--------------------------|
  | RVV objects              |
  |--------------------------|
  | padding before RVV       |
  |--------------------------|
  | scalar local variables   |
  |--------------------------| <-- BP
  | variable size objects    |
  |--------------------------| <-- SP

Note: This patch doesn't contain "tuple" type, e.g. vint32m1x2.

  It will be handled in future patch once the PR389 is ready.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154576

Files:
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/AttrDocs.td
  clang/include/clang/Basic/Specifiers.h
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/AST/Type.cpp
  clang/lib/AST/TypePrinter.cpp
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Basic/Targets/RISCV.h
  clang/lib/CodeGen/CGCall.cpp
  clang/lib/Sema/SemaDeclAttr.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/CodeGen/RISCV/riscv-vector-cc-attr.c
  llvm/include/llvm/AsmParser/LLToken.h
  llvm/include/llvm/IR/CallingConv.h
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/AsmParser/LLParser.cpp
  llvm/lib/IR/AsmWriter.cpp
  llvm/lib/Target/RISCV/RISCVCallingConv.td
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll

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