[clang] f67dfb3 - [RISCV] Use unsigned types for orc_b builtins.

Craig Topper via cfe-commits cfe-commits at lists.llvm.org
Sun Jun 25 22:54:30 PDT 2023


Author: Craig Topper
Date: 2023-06-25T22:54:07-07:00
New Revision: f67dfb3cdb4b980103e262fb4c575e6310032dd4

URL: https://github.com/llvm/llvm-project/commit/f67dfb3cdb4b980103e262fb4c575e6310032dd4
DIFF: https://github.com/llvm/llvm-project/commit/f67dfb3cdb4b980103e262fb4c575e6310032dd4.diff

LOG: [RISCV] Use unsigned types for orc_b builtins.

Inspired by D153235, I think bit manipulation makes more
sense on unsigned types.

Reviewed By: Jim

Differential Revision: https://reviews.llvm.org/D153403

Added: 
    

Modified: 
    clang/include/clang/Basic/BuiltinsRISCV.def
    clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
    clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
    clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c

Removed: 
    


################################################################################
diff  --git a/clang/include/clang/Basic/BuiltinsRISCV.def b/clang/include/clang/Basic/BuiltinsRISCV.def
index 7f84be42faf40..baae5e82bc59f 100644
--- a/clang/include/clang/Basic/BuiltinsRISCV.def
+++ b/clang/include/clang/Basic/BuiltinsRISCV.def
@@ -16,8 +16,8 @@
 #endif
 
 // Zbb extension
-TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "zbb")
-TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "zbb,64bit")
+TARGET_BUILTIN(__builtin_riscv_orc_b_32, "UZiUZi", "nc", "zbb")
+TARGET_BUILTIN(__builtin_riscv_orc_b_64, "UWiUWi", "nc", "zbb,64bit")
 TARGET_BUILTIN(__builtin_riscv_clz_32, "iUZi", "nc", "zbb|xtheadbb")
 TARGET_BUILTIN(__builtin_riscv_clz_64, "iUWi", "nc", "zbb|xtheadbb,64bit")
 TARGET_BUILTIN(__builtin_riscv_ctz_32, "iUZi", "nc", "zbb")

diff  --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
index cb90a26c3b0cd..ecf090a128aac 100644
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c
@@ -1,6 +1,6 @@
 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -verify %s -o -
 
-int orc_b_64(int a) {
+unsigned int orc_b_64(unsigned int a) {
   return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires: 'RV64'}}
 }

diff  --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
index 4129457fcd073..b4610be2714e7 100644
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c
@@ -10,7 +10,7 @@
 // RV32ZBB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[TMP0]])
 // RV32ZBB-NEXT:    ret i32 [[TMP1]]
 //
-int orc_b_32(int a) {
+unsigned int orc_b_32(unsigned int a) {
   return __builtin_riscv_orc_b_32(a);
 }
 
@@ -36,4 +36,4 @@ int clz_32(unsigned int a) {
 //
 int ctz_32(unsigned int a) {
   return __builtin_riscv_ctz_32(a);
-}
\ No newline at end of file
+}

diff  --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c
index baf7de1e0b9f1..62c5996241495 100644
--- a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c
+++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c
@@ -10,7 +10,7 @@
 // RV64ZBB-NEXT:    [[TMP1:%.*]] = call i32 @llvm.riscv.orc.b.i32(i32 [[TMP0]])
 // RV64ZBB-NEXT:    ret i32 [[TMP1]]
 //
-int orc_b_32(int a) {
+unsigned int orc_b_32(unsigned int a) {
   return __builtin_riscv_orc_b_32(a);
 }
 
@@ -22,7 +22,7 @@ int orc_b_32(int a) {
 // RV64ZBB-NEXT:    [[TMP1:%.*]] = call i64 @llvm.riscv.orc.b.i64(i64 [[TMP0]])
 // RV64ZBB-NEXT:    ret i64 [[TMP1]]
 //
-long orc_b_64(long a) {
+unsigned long orc_b_64(unsigned long a) {
   return __builtin_riscv_orc_b_64(a);
 }
 
@@ -78,4 +78,4 @@ int ctz_32(unsigned int a) {
 //
 int ctz_64(unsigned long a) {
   return __builtin_riscv_ctz_64(a);
-}
\ No newline at end of file
+}


        


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