[PATCH] D144911: adding bf16 support to NVPTX

[Artem Belevich via Phabricator via cfe-commits]

tra added a comment.

The latest patch revision still fails on a few LLVM tests:

  Failed Tests (3):
    LLVM :: CodeGen/NVPTX/bf16-instructions.ll
    LLVM :: CodeGen/NVPTX/f16x2-instructions.ll
    LLVM :: CodeGen/NVPTX/math-intrins-sm80-ptx70.ll



================
Comment at: llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp:1308
     return TypeSplitVector;
-  if (VT == MVT::v2f16)
+  if (Isv2f16Orv2bf16Type((EVT)VT))
     return TypeLegal;
----------------
I do not think the cast is necessary. 



================
Comment at: llvm/lib/Target/NVPTX/NVPTXInstrInfo.td:595-596
                 FromName, ".f16 \t$dst, $src;"), []>;
+    def _bf16 :
+      NVPTXInst<(outs RC:$dst),
+                (ins Int16Regs:$src, CvtMode:$mode),
----------------
tra wrote:
> While we're here, it also needs `Requires<[hasPTX<70>, hasSM<80>]>`
This is needed in *addition* to whatever predicate is supplied as an argument. E.g. when we do `defm CVT_f32 : CVT_FROM_ALL<"f32", Float32Regs>;` conversion from f32 to bf16 should still be predicated on `[hasPTX<70>, hasSM<80>]`.



Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D144911/new/

https://reviews.llvm.org/D144911