[clang] c0f0d50 - [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
Yaxun Liu via cfe-commits
cfe-commits at lists.llvm.org
Wed Jun 14 19:54:29 PDT 2023
Author: Yaxun (Sam) Liu
Date: 2023-06-14T22:53:41-04:00
New Revision: c0f0d50653e16145beee474a3d0d602596502dde
URL: https://github.com/llvm/llvm-project/commit/c0f0d50653e16145beee474a3d0d602596502dde
DIFF: https://github.com/llvm/llvm-project/commit/c0f0d50653e16145beee474a3d0d602596502dde.diff
LOG: [HIP] emit macro `__HIP_NO_IMAGE_SUPPORT`
HIP texture/image support is optional as some devices
do not have image instructions. A macro __HIP_NO_IMAGE_SUPPORT
is defined for device not supporting images (https://github.com/ROCm-Developer-Tools/HIP/blob/d0448aa4c4dd0f4b29ccf6a663b7f5ad9f5183e0/docs/reference/kernel_language.md?plain=1#L426 )
Currently the macro is defined by HIP header based on predefined macros
for GPU, e.g __gfx*__ , which is error prone. This patch let clang
emit the predefined macro.
Reviewed by: Matt Arsenault, Artem Belevich
Differential Revision: https://reviews.llvm.org/D151349
Added:
Modified:
clang/include/clang/Basic/DiagnosticFrontendKinds.td
clang/include/clang/Basic/TargetInfo.h
clang/lib/Basic/TargetInfo.cpp
clang/lib/Basic/Targets/AMDGPU.cpp
clang/lib/Basic/Targets/AMDGPU.h
clang/lib/CodeGen/CodeGenModule.cpp
clang/lib/Frontend/InitPreprocessor.cpp
clang/test/Driver/hip-macros.hip
llvm/lib/TargetParser/TargetParser.cpp
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/DiagnosticFrontendKinds.td b/clang/include/clang/Basic/DiagnosticFrontendKinds.td
index 3a71d67d72792..9ed9a88fa3d62 100644
--- a/clang/include/clang/Basic/DiagnosticFrontendKinds.td
+++ b/clang/include/clang/Basic/DiagnosticFrontendKinds.td
@@ -55,6 +55,9 @@ def warn_fe_backend_unsupported_fp_exceptions : Warning<
def warn_fe_backend_invalid_feature_flag : Warning<
"feature flag '%0' must start with either '+' to enable the feature or '-'"
" to disable it; flag ignored">, InGroup<InvalidCommandLineArgument>;
+def warn_fe_backend_readonly_feature_flag : Warning<
+ "feature flag '%0' is ignored since the feature is read only">,
+ InGroup<InvalidCommandLineArgument>;
def err_incompatible_fp_eval_method_options : Error<
"option 'ffp-eval-method' cannot be used with option "
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 2f59a79a8c64a..41ef47eb565b1 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -29,6 +29,7 @@
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/StringSet.h"
#include "llvm/Frontend/OpenMP/OMPGridValues.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/Support/DataTypes.h"
@@ -267,6 +268,12 @@ class TargetInfo : public TransferrableTargetInfo,
// as a DataLayout object.
void resetDataLayout(StringRef DL, const char *UserLabelPrefix = "");
+ // Target features that are read-only and should not be disabled/enabled
+ // by command line options. Such features are for emitting predefined
+ // macros or checking availability of builtin functions and can be omitted
+ // in function attributes in IR.
+ llvm::StringSet<> ReadOnlyFeatures;
+
public:
/// Construct a target for the given options.
///
@@ -1394,6 +1401,11 @@ class TargetInfo : public TransferrableTargetInfo,
return false;
}
+ /// Determine whether the given target feature is read only.
+ bool isReadOnlyFeature(StringRef Feature) const {
+ return ReadOnlyFeatures.count(Feature);
+ }
+
/// Identify whether this target supports multiversioning of functions,
/// which requires support for cpu_supports and cpu_is functionality.
bool supportsMultiVersioning() const {
@@ -1711,6 +1723,9 @@ class TargetInfo : public TransferrableTargetInfo,
: std::optional<VersionTuple>();
}
+ /// Whether to support HIP image/texture API's.
+ virtual bool hasHIPImageSupport() const { return true; }
+
protected:
/// Copy type and layout related info.
void copyAuxTarget(const TargetInfo *Aux);
diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index 6cd5d618a4aca..3f0c9d672f718 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -528,6 +528,8 @@ bool TargetInfo::initFeatureMap(
// Apply the feature via the target.
if (Name[0] != '+' && Name[0] != '-')
Diags.Report(diag::warn_fe_backend_invalid_feature_flag) << Name;
+ else if (isReadOnlyFeature(Name.substr(1)))
+ Diags.Report(diag::warn_fe_backend_readonly_feature_flag) << Name;
else
setFeatureEnabled(Features, Name.substr(1), Name[0] == '+');
}
diff --git a/clang/lib/Basic/Targets/AMDGPU.cpp b/clang/lib/Basic/Targets/AMDGPU.cpp
index 1a85a5675cf1e..7025c7c484001 100644
--- a/clang/lib/Basic/Targets/AMDGPU.cpp
+++ b/clang/lib/Basic/Targets/AMDGPU.cpp
@@ -244,6 +244,7 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
CUMode = !(GPUFeatures & llvm::AMDGPU::FEATURE_WGP);
+ ReadOnlyFeatures.insert("image-insts");
}
void AMDGPUTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h
index 93092edee1b14..300d9691d8a0f 100644
--- a/clang/lib/Basic/Targets/AMDGPU.h
+++ b/clang/lib/Basic/Targets/AMDGPU.h
@@ -46,6 +46,9 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
/// Whether to use cumode or WGP mode. True for cumode. False for WGP mode.
bool CUMode;
+ /// Whether having image instructions.
+ bool HasImage = false;
+
/// Target ID is device name followed by optional feature name postfixed
/// by plus or minus sign delimitted by colon, e.g. gfx908:xnack+:sramecc-.
/// If the target ID contains feature+, map it to true.
@@ -449,6 +452,8 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
CUMode = true;
else if (F == "-cumode")
CUMode = false;
+ else if (F == "+image-insts")
+ HasImage = true;
bool IsOn = F.front() == '+';
StringRef Name = StringRef(F).drop_front();
if (!llvm::is_contained(TargetIDFeatures, Name))
@@ -469,6 +474,8 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
return getCanonicalTargetID(getArchNameAMDGCN(GPUKind),
OffloadArchFeatures);
}
+
+ bool hasHIPImageSupport() const override { return HasImage; }
};
} // namespace targets
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index b5bd9f7c94f56..dd8c384d13171 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -2299,6 +2299,9 @@ bool CodeGenModule::GetCPUAndFeaturesAttributes(GlobalDecl GD,
AddedAttr = true;
}
if (!Features.empty() && SetTargetFeatures) {
+ llvm::erase_if(Features, [&](const std::string& F) {
+ return getTarget().isReadOnlyFeature(F.substr(1));
+ });
llvm::sort(Features);
Attrs.addAttribute("target-features", llvm::join(Features, ","));
AddedAttr = true;
diff --git a/clang/lib/Frontend/InitPreprocessor.cpp b/clang/lib/Frontend/InitPreprocessor.cpp
index 31f9077703cba..16050074c2fcd 100644
--- a/clang/lib/Frontend/InitPreprocessor.cpp
+++ b/clang/lib/Frontend/InitPreprocessor.cpp
@@ -583,8 +583,11 @@ static void InitializeStandardPredefinedMacros(const TargetInfo &TI,
Builder.defineMacro("__HIP_MEMORY_SCOPE_WORKGROUP", "3");
Builder.defineMacro("__HIP_MEMORY_SCOPE_AGENT", "4");
Builder.defineMacro("__HIP_MEMORY_SCOPE_SYSTEM", "5");
- if (LangOpts.CUDAIsDevice)
+ if (LangOpts.CUDAIsDevice) {
Builder.defineMacro("__HIP_DEVICE_COMPILE__");
+ if (!TI.hasHIPImageSupport())
+ Builder.defineMacro("__HIP_NO_IMAGE_SUPPORT", "1");
+ }
if (LangOpts.GPUDefaultStream ==
LangOptions::GPUDefaultStreamKind::PerThread)
Builder.defineMacro("HIP_API_PER_THREAD_DEFAULT_STREAM");
diff --git a/clang/test/Driver/hip-macros.hip b/clang/test/Driver/hip-macros.hip
index f32ee0e64a23c..6056e785f2cee 100644
--- a/clang/test/Driver/hip-macros.hip
+++ b/clang/test/Driver/hip-macros.hip
@@ -42,3 +42,22 @@
// WARN-CUMODE-NOT: warning: ignoring '-mno-cumode' option as it is not currently supported for processor 'gfx906' [-Woption-ignored]
// CUMODE-ON-DAG: #define __AMDGCN_CUMODE__ 1
// CUMODE-OFF-DAG: #define __AMDGCN_CUMODE__ 0
+
+// RUN: %clang -E -dM --offload-arch=gfx90a --cuda-device-only -nogpuinc -nogpulib \
+// RUN: %s 2>&1 | FileCheck --check-prefixes=IMAGE,NOWARN %s
+// RUN: %clang -E -dM --offload-arch=gfx1100 --cuda-device-only -nogpuinc -nogpulib \
+// RUN: %s 2>&1 | FileCheck --check-prefixes=IMAGE,NOWARN %s
+// RUN: %clang -E -dM --offload-arch=gfx940 --cuda-device-only -nogpuinc -nogpulib \
+// RUN: %s 2>&1 | FileCheck --check-prefixes=NOIMAGE,NOWARN %s
+// RUN: %clang -E -dM --offload-arch=gfx941 --cuda-device-only -nogpuinc -nogpulib \
+// RUN: %s 2>&1 | FileCheck --check-prefixes=NOIMAGE,NOWARN %s
+// RUN: %clang -E -dM --offload-arch=gfx942 --cuda-device-only -nogpuinc -nogpulib \
+// RUN: %s 2>&1 | FileCheck --check-prefixes=NOIMAGE,NOWARN %s
+// RUN: %clang -E -dM --offload-arch=gfx1100 --cuda-device-only -nogpuinc -nogpulib \
+// RUN: -Xclang -target-feature -Xclang "-image-insts" %s 2>&1 | FileCheck --check-prefixes=IMAGE,WARN %s
+// RUN: %clang -E -dM --offload-arch=gfx940 --cuda-device-only -nogpuinc -nogpulib \
+// RUN: -Xclang -target-feature -Xclang "+image-insts" %s 2>&1 | FileCheck --check-prefixes=NOIMAGE,WARN %s
+// NOWARN-NOT: warning
+// WARN: warning: feature flag '{{[+|-]}}image-insts' is ignored since the feature is read only [-Winvalid-command-line-argument]
+// IMAGE-NOT: #define __HIP_NO_IMAGE_SUPPORT
+// NOIMAGE: #define __HIP_NO_IMAGE_SUPPORT 1
diff --git a/llvm/lib/TargetParser/TargetParser.cpp b/llvm/lib/TargetParser/TargetParser.cpp
index cd836a20fb2be..e425bebdc58ad 100644
--- a/llvm/lib/TargetParser/TargetParser.cpp
+++ b/llvm/lib/TargetParser/TargetParser.cpp
@@ -279,6 +279,7 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
Features["gfx10-3-insts"] = true;
Features["gfx11-insts"] = true;
Features["atomic-fadd-rtn-insts"] = true;
+ Features["image-insts"] = true;
break;
case GK_GFX1036:
case GK_GFX1035:
@@ -301,6 +302,7 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
Features["gfx9-insts"] = true;
Features["gfx10-insts"] = true;
Features["gfx10-3-insts"] = true;
+ Features["image-insts"] = true;
Features["s-memrealtime"] = true;
Features["s-memtime-inst"] = true;
break;
@@ -322,6 +324,7 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
Features["gfx8-insts"] = true;
Features["gfx9-insts"] = true;
Features["gfx10-insts"] = true;
+ Features["image-insts"] = true;
Features["s-memrealtime"] = true;
Features["s-memtime-inst"] = true;
break;
@@ -333,7 +336,27 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
Features["atomic-ds-pk-add-16-insts"] = true;
Features["atomic-flat-pk-add-16-insts"] = true;
Features["atomic-global-pk-add-bf16-inst"] = true;
- [[fallthrough]];
+ Features["gfx90a-insts"] = true;
+ Features["atomic-buffer-global-pk-add-f16-insts"] = true;
+ Features["atomic-fadd-rtn-insts"] = true;
+ Features["dot3-insts"] = true;
+ Features["dot4-insts"] = true;
+ Features["dot5-insts"] = true;
+ Features["dot6-insts"] = true;
+ Features["mai-insts"] = true;
+ Features["dl-insts"] = true;
+ Features["dot1-insts"] = true;
+ Features["dot2-insts"] = true;
+ Features["dot7-insts"] = true;
+ Features["dot10-insts"] = true;
+ Features["gfx9-insts"] = true;
+ Features["gfx8-insts"] = true;
+ Features["16-bit-insts"] = true;
+ Features["dpp"] = true;
+ Features["s-memrealtime"] = true;
+ Features["ci-insts"] = true;
+ Features["s-memtime-inst"] = true;
+ break;
case GK_GFX90A:
Features["gfx90a-insts"] = true;
Features["atomic-buffer-global-pk-add-f16-insts"] = true;
@@ -381,6 +404,7 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
case GK_GFX602:
case GK_GFX601:
case GK_GFX600:
+ Features["image-insts"] = true;
Features["s-memtime-inst"] = true;
break;
case GK_NONE:
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