[PATCH] D150926: [RISCV] Support LMUL!=1 for __attribute__((riscv_rvv_vector_bits(N)))

[Craig Topper via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG72d23a2ec1b9: [RISCV] Support LMUL!=1 for __attribute__((riscv_rvv_vector_bits(N))) (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D150926?vs=529475&id=529628#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150926/new/

https://reviews.llvm.org/D150926

Files:
  clang/include/clang/Basic/AttrDocs.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/AST/ASTContext.cpp
  clang/lib/AST/Type.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
  clang/test/Driver/riscv-rvv-vector-bits.c
  clang/test/Sema/attr-riscv-rvv-vector-bits.c

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