[PATCH] D150670: [WebAssembly] Disable generation of fshl/fshr for rotates

Paulo Matos via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon May 29 01:55:13 PDT 2023


pmatos added inline comments.


================
Comment at: llvm/test/Transforms/InstCombine/fsh.ll:664
+; CHECK-NEXT:    [[T1:%.*]] = and i32 [[A:%.*]], -65536
+; CHECK-NEXT:    [[T2:%.*]] = call i32 @llvm.fshl.i32(i32 [[T1]], i32 [[T1]], i32 16)
 ; CHECK-NEXT:    ret i32 [[T2]]
----------------
pmatos wrote:
> nikic wrote:
> > We still want to simplify this case. Could possibly be done by checking whether all demanded bits are zero for one of the operands in the rotate case.
> Ah, yes,  right. That should be just a simple shift right. Will see how to still allow that change. Thanks.
I am still looking into the best way to handle this case. The issue is that we only know if the demanded bits are zero when analyzing the uses of the value. This is done in SimplifyDemandedBits which in turn calls SimplifyDemandedUseBits, but we cannot call these functions to obtain demanded bits because they'll change the instruction straightaway.  I was seeing if there was a way to do the checks inside the block of code already changed, but I don't think that'll be possible. I might have to add a check to SimplifyDemandedUseBits to only simplify in this specific case we want.


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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150670/new/

https://reviews.llvm.org/D150670



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