[clang] c51fceb - [RISCV] Remove unused CHECK-ILP lines from attr-riscv-rvv-vector-bits-types.c. NFC
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Thu May 18 15:47:38 PDT 2023
Author: Craig Topper
Date: 2023-05-18T15:47:29-07:00
New Revision: c51fcebbbfd389e5dd8c6437da169c46dedfe51d
URL: https://github.com/llvm/llvm-project/commit/c51fcebbbfd389e5dd8c6437da169c46dedfe51d
DIFF: https://github.com/llvm/llvm-project/commit/c51fcebbbfd389e5dd8c6437da169c46dedfe51d.diff
LOG: [RISCV] Remove unused CHECK-ILP lines from attr-riscv-rvv-vector-bits-types.c. NFC
I must have copied these from SVE by accident. They aren't relevant
for RISC-V.
Added:
Modified:
clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
Removed:
################################################################################
diff --git a/clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c b/clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
index 8ebbbf181fd3..ce5217b0f445 100644
--- a/clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
+++ b/clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
@@ -473,11 +473,3 @@ void f() {
// CHECK-1024-NEXT: %local_arr_u64 = alloca [3 x <16 x i64>], align 8
// CHECK-1024-NEXT: %local_arr_f32 = alloca [3 x <32 x float>], align 8
// CHECK-1024-NEXT: %local_arr_f64 = alloca [3 x <16 x double>], align 8
-
-//===----------------------------------------------------------------------===//
-// ILP32 ABI
-//===----------------------------------------------------------------------===//
-// CHECK-ILP32: @global_i32 ={{.*}} global <16 x i32> zeroinitializer, align 8
-// CHECK-ILP32: @global_i64 ={{.*}} global <8 x i64> zeroinitializer, align 8
-// CHECK-ILP32: @global_u32 ={{.*}} global <16 x i32> zeroinitializer, align 8
-// CHECK-ILP32: @global_u64 ={{.*}} global <8 x i64> zeroinitializer, align 8
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