[PATCH] D149562: [clang-format] Stop comment disrupting indentation of Verilog ports

[sstwcw via Phabricator via cfe-commits]

sstwcw added a comment.

> I agree if the brace doesn't start a block, but clang-format sometimes got it wrong and misannotates a block as a braced list. (See https://github.com/llvm/llvm-project/issues/33891 for an example.)

This patch isn't affected by the problem.  The Verilog port list is not as ambiguous as braced blocks.

> I'll go along with other reviewers on this one.

So what do the other reviewers think about this patch?  The braced initialization list thing was added a long time ago by DJasper, so that behavior probably has to stay.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149562/new/

https://reviews.llvm.org/D149562