[PATCH] D150253: [RISCV] Add Zvfhmin extension.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added a comment.

Don’t you need to make f16 vectors legal types in the backend?

And you need to disable intrinsics for instructions that aren’t supported by Zfhmin. Like f16 vector fadd

And you also need to make the backend only allow f16 vector operations that are supported with Zfhmin.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D150253/new/

https://reviews.llvm.org/D150253