[PATCH] D132819: [RISCV] Add MC support of RISCV zcmp Extension
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue May 2 10:48:07 PDT 2023
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
LGTM with the last 4 few comments addressed.
================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h:550
+ if (RlistVal == RLISTENCODE::INVALID_RLIST)
+ assert(0 && "{ra, s0-s10} is not supported, s11 must be included.");
+ if (IsEABI)
----------------
assert(RlistVal != RLISTENCODE::INVALID_RLIST && "{ra, s0-s10} is not supported, s11 must be included.")
================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp:494
+ MCOperand MO = MI.getOperand(OpNo);
+ assert(MO.isImm() && "Rlist operand must be immidiate");
+ auto Imm = MO.getImm();
----------------
craig.topper wrote:
> immidiate -> immediate
This wasn't fixed. immediate is still misspelled
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZc.td:47
+
+def rlist : Operand<OtherVT>, ImmLeaf<OtherVT, [{return isUInt<4>(Imm);}]> {
+ let ParserMatchClass = RlistAsmOperand;
----------------
I think you can drop the ImmLeaf. That's only needed if this is used in an isel pattern, but I don't think it ever will be.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZc.td:62
+
+def spimm : Operand<OtherVT>, ImmLeaf<OtherVT, [{return isShiftedUInt<5, 4>(Imm);}]>{
+ let ParserMatchClass = SpimmAsmOperand;
----------------
I think you can drop ImmLeaf. That's only needed for isel patterns.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D132819/new/
https://reviews.llvm.org/D132819
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