[PATCH] D149642: [RISCV] Support vreinterpret intrinsics between vector boolean type and m1 vector integer type

Yueh-Ting (eop) Chen via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue May 2 03:17:44 PDT 2023


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Link to specification: riscv-non-isa/rvv-intrinsic-doc#221

Unlike existing `vreinterpret` intrinsics, we cannot reuse `bitcast` because the actual vector length
may not be equal (e.g. casting a `vbool64_t` to an `vint32m1_t`). So creating intrinsic `vreinterpret_v`
in LLVM IR side to handle this.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D149642

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vreinterpret.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vreinterpret.c
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

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