[PATCH] D149561: [clang-format] Recognize Verilog edge identifiers
MyDeveloperDay via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon May 1 06:14:51 PDT 2023
MyDeveloperDay added a comment.
Could you add anotator tests?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149561/new/
https://reviews.llvm.org/D149561
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