[PATCH] D149498: [RISCV] Add Scheduling information for Zfh to SiFive7 model

[Michael Maitland via Phabricator via cfe-commits]

michaelmaitland updated this revision to Diff 518089.
michaelmaitland added a comment.
Herald added a project: clang.
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Add zfh to `clang/test/Driver/riscv-cpus.c`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149498/new/

https://reviews.llvm.org/D149498

Files:
  clang/test/Driver/riscv-cpus.c
  llvm/lib/Target/RISCV/RISCVSchedSiFive7.td

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