[PATCH] D148767: Rename includes

NAKAMURA Takumi via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Apr 19 17:27:36 PDT 2023


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Restore MVT and LLT into llvm/CodeGen

This is rework of;

- D30046 <https://reviews.llvm.org/D30046> (LLT)
- rG13e77db2df94 <https://reviews.llvm.org/rG13e77db2df94b7b959a4965439f2d994d225d908> (r328395; MVT)

Depends on D145937 <https://reviews.llvm.org/D145937> and D146352 <https://reviews.llvm.org/D146352>
Since they have decoupled `MVT` from `llvm-min-tblgen`,
`llvm-tblgen` may use `llvm/CodeGen` to generate target td.

Theoretically, `llvm-tblgen` may depend on `CodeGen` and I have done in this.
But `CodeGen` has many dependencies that are irrelevant to MVT and LLT.

Besides, I had to isolate MVT and LLT, since `llvm::PredicateInfo` clashes
between `TableGen/CodeGenSchedule.h` and `Transforms/Utils/PredicateInfo.h`.
(I think better to introduce `namespace llvm::Tablegen`)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D148767

Files:
  clang/lib/CodeGen/CMakeLists.txt
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/include/llvm/CodeGen/CostTable.h
  llvm/include/llvm/CodeGen/FastISel.h
  llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
  llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
  llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
  llvm/include/llvm/CodeGen/GlobalISel/LegacyLegalizerInfo.h
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
  llvm/include/llvm/CodeGen/GlobalISel/Utils.h
  llvm/include/llvm/CodeGen/LowLevelType.h
  llvm/include/llvm/CodeGen/MachineMemOperand.h
  llvm/include/llvm/CodeGen/MachineValueType.h
  llvm/include/llvm/CodeGen/RegisterBankInfo.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/CodeGen/TargetCallingConv.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/include/llvm/CodeGen/ValueTypes.h
  llvm/include/llvm/Support/LowLevelTypeImpl.h
  llvm/include/llvm/Support/MachineValueType.h
  llvm/include/llvm/module.modulemap
  llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
  llvm/lib/CodeGen/CodeGenPrepare.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
  llvm/lib/CodeGen/LowLevelType.cpp
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/CodeGen/MIRPrinter.cpp
  llvm/lib/CodeGen/MachineInstr.cpp
  llvm/lib/CodeGen/MachineScheduler.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/CodeGen/TargetRegisterInfo.cpp
  llvm/lib/Support/CMakeLists.txt
  llvm/lib/Support/LowLevelType.cpp
  llvm/lib/Target/AArch64/AArch64FastISel.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt
  llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
  llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
  llvm/lib/Target/AMDGPU/MCA/CMakeLists.txt
  llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt
  llvm/lib/Target/ARM/ARMCallLowering.cpp
  llvm/lib/Target/ARM/ARMFastISel.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
  llvm/lib/Target/ARM/AsmParser/CMakeLists.txt
  llvm/lib/Target/ARM/Disassembler/CMakeLists.txt
  llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/AVR/AsmParser/CMakeLists.txt
  llvm/lib/Target/AVR/Disassembler/CMakeLists.txt
  llvm/lib/Target/Hexagon/HexagonISelLowering.h
  llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  llvm/lib/Target/Hexagon/HexagonInstrInfo.h
  llvm/lib/Target/Lanai/AsmParser/CMakeLists.txt
  llvm/lib/Target/Lanai/Disassembler/CMakeLists.txt
  llvm/lib/Target/Lanai/LanaiISelLowering.cpp
  llvm/lib/Target/M68k/M68kMachineFunction.h
  llvm/lib/Target/MSP430/AsmParser/CMakeLists.txt
  llvm/lib/Target/Mips/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
  llvm/lib/Target/Mips/MipsFastISel.cpp
  llvm/lib/Target/Mips/MipsISelLowering.cpp
  llvm/lib/Target/Mips/MipsISelLowering.h
  llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
  llvm/lib/Target/Mips/MipsSEISelLowering.cpp
  llvm/lib/Target/Mips/MipsSEISelLowering.h
  llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
  llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/RISCV/MCA/CMakeLists.txt
  llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/VE/AsmParser/CMakeLists.txt
  llvm/lib/Target/VE/Disassembler/CMakeLists.txt
  llvm/lib/Target/VE/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/WebAssembly/AsmParser/CMakeLists.txt
  llvm/lib/Target/WebAssembly/Disassembler/CMakeLists.txt
  llvm/lib/Target/WebAssembly/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
  llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h
  llvm/lib/Target/WebAssembly/Utils/WebAssemblyTypeUtilities.h
  llvm/lib/Target/X86/MCA/CMakeLists.txt
  llvm/lib/Target/X86/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/X86/X86AsmPrinter.cpp
  llvm/lib/Target/X86/X86CallLowering.cpp
  llvm/lib/Target/X86/X86InstructionSelector.cpp
  llvm/lib/Target/X86/X86InterleavedAccess.cpp
  llvm/lib/Target/XCore/Disassembler/CMakeLists.txt
  llvm/tools/llvm-dwarfutil/CMakeLists.txt
  llvm/tools/llvm-exegesis/CMakeLists.txt
  llvm/tools/llvm-exegesis/lib/AArch64/CMakeLists.txt
  llvm/tools/llvm-exegesis/lib/Mips/CMakeLists.txt
  llvm/tools/llvm-exegesis/lib/PowerPC/CMakeLists.txt
  llvm/unittests/CodeGen/MachineOperandTest.cpp
  llvm/unittests/CodeGen/ScalableVectorMVTsTest.cpp
  llvm/unittests/DebugInfo/DWARF/CMakeLists.txt
  llvm/unittests/Support/MVTTest.cpp
  llvm/utils/TableGen/CMakeLists.txt
  llvm/utils/TableGen/CodeGenInstruction.h
  llvm/utils/TableGen/CodeGenTarget.h
  llvm/utils/TableGen/DAGISelMatcher.h
  llvm/utils/TableGen/GlobalISel/CMakeLists.txt
  llvm/utils/TableGen/GlobalISelEmitter.cpp
  llvm/utils/TableGen/InfoByHwMode.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp
  utils/bazel/llvm-project-overlay/llvm/BUILD.bazel

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