[clang] f98ca36 - [RISCV] Modify arch string parsing order according to latest riscv spec

[Jun Sha via cfe-commits]

Author: Jun Sha (Joshua)
Date: 2023-04-18T16:20:08+08:00
New Revision: f98ca363bed7405a23ad4b77167e39505a1ca9dd

URL: https://github.com/llvm/llvm-project/commit/f98ca363bed7405a23ad4b77167e39505a1ca9dd
DIFF: https://github.com/llvm/llvm-project/commit/f98ca363bed7405a23ad4b77167e39505a1ca9dd.diff

LOG: [RISCV] Modify arch string parsing order according to latest riscv spec

According to latest risc-v spec, the canonical order in which extension names must appear in the name string specified in Table 29.1 is different from before. In the latest table, non-standard extensions must be listed after all standard extensions. To keep consistent, we now change the parsing order in parseArchString().

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D148315

Added: 
    

Modified: 
    clang/test/Driver/riscv-arch.c
    llvm/lib/Support/RISCVISAInfo.cpp

Removed: 
    


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diff  --git a/clang/test/Driver/riscv-arch.c b/clang/test/Driver/riscv-arch.c
index 7f89344c1dc06..573f4a6d1f395 100644
--- a/clang/test/Driver/riscv-arch.c
+++ b/clang/test/Driver/riscv-arch.c
@@ -301,10 +301,10 @@
 // RV32SX-UNS: error: invalid arch name 'rv32isxabc',
 // RV32SX-UNS: unsupported non-standard supervisor-level extension 'sxabc'
 
-// RUN: %clang --target=riscv32-unknown-elf -march=rv32ixabc_sp_sxlw -### %s \
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isp_xabc_sxlw -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32ALL %s
-// RV32ALL: error: invalid arch name 'rv32ixabc_sp_sxlw',
-// RV32ALL: unsupported non-standard user-level extension 'xabc'
+// RV32ALL: error: invalid arch name 'rv32isp_xabc_sxlw',
+// RV32ALL: unsupported standard supervisor-level extension 'sp'
 
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32i20 -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-IVER %s
@@ -351,11 +351,11 @@
 // RV32-PREFIX: error: invalid arch name 'rv32ixabc_a',
 // RV32-PREFIX: invalid extension prefix 'a'
 
-// RUN: %clang --target=riscv32-unknown-elf -march=rv32isabc_xdef -### %s \
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32ixdef_sabc -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-X-ORDER %s
-// RV32-X-ORDER: error: invalid arch name 'rv32isabc_xdef',
-// RV32-X-ORDER: non-standard user-level extension not given
-// RV32-X-ORDER: in canonical order 'xdef'
+// RV32-X-ORDER: error: invalid arch name 'rv32ixdef_sabc',
+// RV32-X-ORDER: standard supervisor-level extension not given
+// RV32-X-ORDER: in canonical order 'sabc'
 
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32isxabc_sdef -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-S-ORDER %s
@@ -373,10 +373,10 @@
 // RV32-X-X-INVAL: error: invalid arch name 'rv32ixabc_xdef', unsupported
 // RV32-X-X-INVAL: non-standard user-level extension 'xabc'
 
-// RUN: %clang --target=riscv32-unknown-elf -march=rv32ixabc_sdef_sxghi -### %s \
+// RUN: %clang --target=riscv32-unknown-elf -march=rv32isdef_xabc_sxghi -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-X-S-SX-INVAL %s
-// RV32-X-S-SX-INVAL: error: invalid arch name 'rv32ixabc_sdef_sxghi',
-// RV32-X-S-SX-INVAL: unsupported non-standard user-level extension 'xabc'
+// RV32-X-S-SX-INVAL: error: invalid arch name 'rv32isdef_xabc_sxghi',
+// RV32-X-S-SX-INVAL: unsupported standard supervisor-level extension 'sdef'
 
 // RUN: %clang --target=riscv32-unknown-elf -march=rv32i -### %s \
 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-TARGET %s

diff  --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp
index 9adcd925658d4..85386dfa9bba3 100644
--- a/llvm/lib/Support/RISCVISAInfo.cpp
+++ b/llvm/lib/Support/RISCVISAInfo.cpp
@@ -758,7 +758,7 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
   // Parse the ISA string containing non-standard user-level
   // extensions, standard supervisor-level extensions and
   // non-standard supervisor-level extensions.
-  // These extensions start with 'z', 'x', 's', 'sx' prefixes, follow a
+  // These extensions start with 'z', 's', 's', 'sx' prefixes, follow a
   // canonical order, might have a version number (major, minor)
   // and are separated by a single underscore '_'.
   // Set the hardware features for the extensions that are supported.
@@ -769,7 +769,7 @@ RISCVISAInfo::parseArchString(StringRef Arch, bool EnableExperimentalExtension,
   OtherExts.split(Split, '_');
 
   SmallVector<StringRef, 8> AllExts;
-  std::array<StringRef, 4> Prefix{"z", "x", "s", "sx"};
+  std::array<StringRef, 4> Prefix{"z", "s", "x", "sx"};
   auto I = Prefix.begin();
   auto E = Prefix.end();
   if (Split.size() > 1 || Split[0] != "") {