[PATCH] D147895: [clang-format] Handle Verilog assertions and loops

[sstwcw via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0571ba8d1b4d: [clang-format] Handle Verilog assertions and loops (authored by sstwcw).

Changed prior to commit:
  https://reviews.llvm.org/D147895?vs=512044&id=514053#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147895/new/

https://reviews.llvm.org/D147895

Files:
  clang/lib/Format/TokenAnnotator.cpp
  clang/lib/Format/UnwrappedLineParser.cpp
  clang/lib/Format/UnwrappedLineParser.h
  clang/unittests/Format/FormatTestVerilog.cpp
  clang/unittests/Format/TokenAnnotatorTest.cpp

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