[PATCH] D143364: [RISCV] Support scalar/fix-length vector NTLH intrinsic with different domain
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Apr 12 10:39:52 PDT 2023
craig.topper added inline comments.
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Comment at: clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c:19
+typedef signed short v8ss __attribute__((vector_size(16)));
+typedef signed char v16sc __attribute__((vector_size(16)));
+v4si v4si1, v4si2;
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What about the rvv builtin types for scalable vectors?
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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:15347
+ if (NontemporalLevel == 1)
+ NontemporalLevel = 5;
+
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Should we default Nontemporal level to 5 before looking at riscv-nontemporal-domain? Then only 2-5 are legal values?
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:2635
+ static const std::pair<MachineMemOperand::Flags, const char *> TargetFlags[] =
+ {{MONontemporalBit0, "riscv-non-temporal-domain-bit-0"},
+ {MONontemporalBit1, "riscv-non-temporal-domain-bit-1"}};
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This uses "non-temporal" and the metadata uses "nontemporal". I think we should be consistent.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143364/new/
https://reviews.llvm.org/D143364
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