[PATCH] D145088: [RISCV] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.

Craig Topper via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Apr 11 14:25:11 PDT 2023


craig.topper added a comment.

In D145088#4258856 <https://reviews.llvm.org/D145088#4258856>, @erichkeane wrote:

> So I don't see any handling of the dependent version of this, we probably need tests for those at minimum.

Does SVE handle the dependent version?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D145088/new/

https://reviews.llvm.org/D145088



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