[PATCH] D147935: [RISCV] Add SiFive extension support
Brandon Wu via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Apr 10 06:05:55 PDT 2023
4vtomat created this revision.
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Add SiFive extension support
Depends on D147934 <https://reviews.llvm.org/D147934>
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D147935
Files:
clang/include/clang/Support/RISCVVIntrinsicUtils.h
clang/utils/TableGen/RISCVVEmitter.cpp
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===================================================================
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -633,6 +633,7 @@
RVVRequire RequireExt = StringSwitch<RVVRequire>(RequiredFeature)
.Case("RV64", RVV_REQ_RV64)
.Case("FullMultiply", RVV_REQ_FullMultiply)
+ .Case("Xsfvcp", RVV_REQ_xsfvcp)
.Default(RVV_REQ_None);
assert(RequireExt != RVV_REQ_None && "Unrecognized required feature?");
SR.RequiredExtensions |= RequireExt;
Index: clang/include/clang/Support/RISCVVIntrinsicUtils.h
===================================================================
--- clang/include/clang/Support/RISCVVIntrinsicUtils.h
+++ clang/include/clang/Support/RISCVVIntrinsicUtils.h
@@ -462,8 +462,9 @@
RVV_REQ_None = 0,
RVV_REQ_RV64 = 1 << 0,
RVV_REQ_FullMultiply = 1 << 1,
+ RVV_REQ_xsfvcp = 1 << 2,
- LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_FullMultiply)
+ LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_xsfvcp)
};
// Raw RVV intrinsic info, used to expand later.
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