[PATCH] D146463: [CodeGen][RISCV] Change Shadow Call Stack Register to X3

[Paul Kirth via Phabricator via cfe-commits]

paulkirth added a comment.

@asb, @craig.topper, @jrtc27  Are there any remaining considerations for us here? From the discussions in psABI and sig-toolchain, I think we have a consensus that this is the approach we'll be taking for RISC-V. We'd prefer to correct this ASAP, so as to prevent future incompatibility/continuing to use a non-standard register.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146463/new/

https://reviews.llvm.org/D146463