[PATCH] D141672: [RISCV] Support vector crypto extension ISA string and assembly
Brandon Wu via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Mar 21 03:32:32 PDT 2023
4vtomat updated this revision to Diff 506894.
4vtomat added a comment.
Resolved Craig's comment.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D141672/new/
https://reviews.llvm.org/D141672
Files:
clang/test/Preprocessor/riscv-target-features.c
llvm/docs/RISCVUsage.rst
llvm/lib/Support/RISCVISAInfo.cpp
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/RISCVFeatures.td
llvm/lib/Target/RISCV/RISCVInstrFormats.td
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
llvm/test/CodeGen/RISCV/attributes.ll
llvm/test/MC/RISCV/attribute-arch.s
llvm/test/MC/RISCV/rvv/zvkb.s
llvm/test/MC/RISCV/rvv/zvkg.s
llvm/test/MC/RISCV/rvv/zvkned-invalid.s
llvm/test/MC/RISCV/rvv/zvkned.s
llvm/test/MC/RISCV/rvv/zvknh.s
llvm/test/MC/RISCV/rvv/zvksed-invalid.s
llvm/test/MC/RISCV/rvv/zvksed.s
llvm/test/MC/RISCV/rvv/zvksh.s
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