[PATCH] D145883: [Flang][RISCV] Emit target features for RISC-V

[Kiran Chandramohan via Phabricator via cfe-commits]

kiranchandramohan added inline comments.


================
Comment at: clang/lib/Driver/ToolChains/Flang.cpp:112-114
+  case llvm::Triple::riscv64:
+    getTargetFeatures(D, Triple, Args, CmdArgs, /*ForAs*/ false);
+    break;
----------------
jrtc27 wrote:
> mnadeem wrote:
> > identical code, could just do a fallthrough
> Why is this even conditional??
There could be other ways to do this. But it provided a way to understand the list of supported architectures.


================
Comment at: flang/test/Driver/target-cpu-features.f90:25-26
 
+! RUN: %flang --target=riscv32-linux-gnu -c %s -### 2>&1 \
+! RUN: | FileCheck %s -check-prefix=CHECK-RV32
+
----------------
32-bit architectures are generally not supported. This test could be misleading.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145883/new/

https://reviews.llvm.org/D145883