[PATCH] D145883: [Flang][RISCV] Emit target features for RISC-V
Jessica Clarke via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Mar 13 01:29:04 PDT 2023
jrtc27 added inline comments.
================
Comment at: flang/test/Driver/target-features.f90:1
+! RUN: %flang --target=riscv64-linux-gnu --target=riscv64 -c %s -### 2>&1 \
+! RUN: | FileCheck %s -check-prefix=CHECK-RV64
----------------
awarzynski wrote:
> jrtc27 wrote:
> > awarzynski wrote:
> > > What happens if the RISC-V backend is not available?
> > Clang doesn't need a backend to be available to generate IR for that architecture. I would hope Flang is the same.
> > Clang doesn't need a backend to be available to generate IR
>
> This test is not generating LLVM IR. It does, however, specify the target which is then translated into many **LLVM**-specific flags.
>
> Also:
> ```
> clang --target=riscv64-linux-gnu --target=riscv64 -c file2.c
> error: unable to create target: 'No available targets are compatible with triple "riscv64"'
> 1 error generated.
> ```
Because you're trying to use the backend. Pass --emit-llvm and observe it works.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D145883/new/
https://reviews.llvm.org/D145883
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