[PATCH] D145883: [Flang][RISCV] Emit target features for RISC-V

[Jessica Clarke via Phabricator via cfe-commits]

jrtc27 added inline comments.


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Comment at: flang/test/Driver/target-features.f90:1
+! RUN: %flang --target=riscv64-linux-gnu --target=riscv64 -c %s -### 2>&1 \
+! RUN: | FileCheck %s -check-prefix=CHECK-RV64
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awarzynski wrote:
> What happens if the RISC-V backend is not available?
Clang doesn't need a backend to be available to generate IR for that architecture. I would hope Flang is the same.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D145883/new/

https://reviews.llvm.org/D145883