[PATCH] D145883: [Flang][RISCV] Emit target features for RISC-V

[Usman Nadeem via Phabricator via cfe-commits]

mnadeem added a comment.

There is an existing test `flang/test/Driver/target-cpu-features.f90` added in D137995 <https://reviews.llvm.org/D137995>

Would it be better to add RISCV to that file? or perhaps rename the tests to have target specific files?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D145883/new/

https://reviews.llvm.org/D145883