[PATCH] D143467: [PowerPC] Add target feature requirement to builtins
Nemanja Ivanovic via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Mar 9 12:05:35 PST 2023
nemanjai added inline comments.
================
Comment at: clang/include/clang/Basic/BuiltinsPPC.def:491
+TARGET_BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "", "altivec")
+TARGET_BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "", "altivec")
----------------
qiucf wrote:
> shchenz wrote:
> > These builtins `vabsdub`, `vabsduh`, `vabsduw` should require ISA3.0 which is not altivec or vsx. Do we have a reasonable feature for Power9 instructions, `power9-vector` maybe?
> Thanks. I'll update then. `power9-vector` is good option. But I'm curious what's the different pratical usages from `power9-vector` and `isa-v30-instructions`. Maybe cc @nemanjai
We don't want ISA 3.0 to imply that it is OK to use vector instructions. For example, most of the distros are now Power9 and up. So the kernel is built with `-mcpu=power9`. However, the kernel is also built with `-mno-altivec` so we don't want to allow any use of vector instructions/registers in the kernel while we want ISA 3.0 instructions.
And that's just one use case. Ultimately, we keep these separate so we can control scalar ISA<N> instructions independently of the vector ones.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D143467/new/
https://reviews.llvm.org/D143467
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