[PATCH] D143439: [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension

Philipp Tomsich via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Feb 13 08:02:24 PST 2023


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGfc02eeb24fc0: [RISCV] Add vendor-defined XTheadBb (basic bit-manipulation) extension (authored by philipp.tomsich).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143439/new/

https://reviews.llvm.org/D143439

Files:
  clang/include/clang/Basic/BuiltinsRISCV.def
  clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-xtheadbb.c
  clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-xtheadbb.c
  llvm/docs/RISCVUsage.rst
  llvm/docs/ReleaseNotes.rst
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
  llvm/lib/Target/RISCV/RISCVFeatures.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
  llvm/test/CodeGen/RISCV/imm.ll
  llvm/test/CodeGen/RISCV/rotl-rotr.ll
  llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
  llvm/test/CodeGen/RISCV/rv64xtheadbb.ll

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