[PATCH] D127910: [Clang][AArch64][SME] Add vector load/store (ld1/st1) intrinsics

[Sander de Smalen via Phabricator via cfe-commits]

sdesmalen added inline comments.


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Comment at: clang/lib/Headers/CMakeLists.txt:332
+  # Generate arm_sme.h
+  clang_generate_header(-gen-arm-sme-header arm_sme.td arm_sme.h)
   # Generate arm_bf16.h
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The ACLE specification is still in a draft (ALP) state, which means there may still be subject to significant changes. To avoid users from using this implementation with the expectation that their code is compliant going forward, it would be good to rename the header file to something that makes it very clear this feature is not yet ready to use. I'm thinking of something like `arm_sme_draft_spec_subject_to_change.h`. When the specification goes out of draft, we can rename it to `arm_sme.h`. Could you rename the file for now?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D127910/new/

https://reviews.llvm.org/D127910