[clang] 54b40a1 - [1/3][Clang][RISCV] Add `__riscv_` prefix for vread, vwrite, vlenb, vsetvl, and vsetvlmax
via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 31 01:06:09 PST 2023
Author: eopXD
Date: 2023-01-31T01:06:03-08:00
New Revision: 54b40a1785e9e7602fd69cd274cb46fc5746e029
URL: https://github.com/llvm/llvm-project/commit/54b40a1785e9e7602fd69cd274cb46fc5746e029
DIFF: https://github.com/llvm/llvm-project/commit/54b40a1785e9e7602fd69cd274cb46fc5746e029.diff
LOG: [1/3][Clang][RISCV] Add `__riscv_` prefix for vread, vwrite, vlenb, vsetvl, and vsetvlmax
This commit adds prefix for intrinsics that are defined through
`HeaderCode` under `riscv_vector.td`.
This is the 1st commit of a patch-set to add `__riscv_` for all RVV
intrinsics.
This follows the naming guideline under riscv-c-api-doc to add the
`__riscv_` suffix for all RVV intrinsics.
Pull Request:
riscv-non-isa/riscv-c-api-doc#31
riscv-non-isa/rvv-intrinsic-doc#189
Depends on D142016.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D142085
Added:
Modified:
clang/include/clang/Basic/riscv_vector.td
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vread-csr.c
clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vwrite-csr.c
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td
index c63cba9aa459f..b23e26ecaa579 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -1539,7 +1539,7 @@ enum RVV_CSR {
};
static __inline__ __attribute__((__always_inline__, __nodebug__))
-unsigned long vread_csr(enum RVV_CSR __csr) {
+unsigned long __riscv_vread_csr(enum RVV_CSR __csr) {
unsigned long __rv = 0;
switch (__csr) {
case RVV_VSTART:
@@ -1559,7 +1559,7 @@ unsigned long vread_csr(enum RVV_CSR __csr) {
}
static __inline__ __attribute__((__always_inline__, __nodebug__))
-void vwrite_csr(enum RVV_CSR __csr, unsigned long __value) {
+void __riscv_vwrite_csr(enum RVV_CSR __csr, unsigned long __value) {
switch (__csr) {
case RVV_VSTART:
__asm__ __volatile__ ("csrw\tvstart, %z0" : : "rJ"(__value) : "memory");
@@ -1580,7 +1580,7 @@ def vread_vwrite_csr: RVVHeader;
let HeaderCode =
[{
-#define vlenb() __builtin_rvv_vlenb()
+#define __riscv_vlenb() __builtin_rvv_vlenb()
}] in
def vlenb_macro: RVVHeader;
@@ -1611,62 +1611,62 @@ let HasBuiltinAlias = false, HasVL = false, HasMasked = false,
// and LMUL.
let HeaderCode =
[{
-#define vsetvl_e8mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 6)
-#define vsetvl_e8mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 7)
-#define vsetvl_e8m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 0)
-#define vsetvl_e8m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 1)
-#define vsetvl_e8m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 2)
-#define vsetvl_e8m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 3)
-
-#define vsetvl_e16mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 7)
-#define vsetvl_e16m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 0)
-#define vsetvl_e16m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 1)
-#define vsetvl_e16m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 2)
-#define vsetvl_e16m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 3)
-
-#define vsetvl_e32m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 0)
-#define vsetvl_e32m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 1)
-#define vsetvl_e32m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 2)
-#define vsetvl_e32m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 3)
+#define __riscv_vsetvl_e8mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 6)
+#define __riscv_vsetvl_e8mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 7)
+#define __riscv_vsetvl_e8m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 0)
+#define __riscv_vsetvl_e8m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 1)
+#define __riscv_vsetvl_e8m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 2)
+#define __riscv_vsetvl_e8m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 3)
+
+#define __riscv_vsetvl_e16mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 7)
+#define __riscv_vsetvl_e16m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 0)
+#define __riscv_vsetvl_e16m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 1)
+#define __riscv_vsetvl_e16m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 2)
+#define __riscv_vsetvl_e16m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 3)
+
+#define __riscv_vsetvl_e32m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 0)
+#define __riscv_vsetvl_e32m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 1)
+#define __riscv_vsetvl_e32m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 2)
+#define __riscv_vsetvl_e32m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 3)
#if __riscv_v_elen >= 64
-#define vsetvl_e8mf8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 5)
-#define vsetvl_e16mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 6)
-#define vsetvl_e32mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 7)
-
-#define vsetvl_e64m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 0)
-#define vsetvl_e64m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 1)
-#define vsetvl_e64m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 2)
-#define vsetvl_e64m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 3)
+#define __riscv_vsetvl_e8mf8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 5)
+#define __riscv_vsetvl_e16mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 1, 6)
+#define __riscv_vsetvl_e32mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 2, 7)
+
+#define __riscv_vsetvl_e64m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 0)
+#define __riscv_vsetvl_e64m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 1)
+#define __riscv_vsetvl_e64m4(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 2)
+#define __riscv_vsetvl_e64m8(avl) __builtin_rvv_vsetvli((size_t)(avl), 3, 3)
#endif
-#define vsetvlmax_e8mf4() __builtin_rvv_vsetvlimax(0, 6)
-#define vsetvlmax_e8mf2() __builtin_rvv_vsetvlimax(0, 7)
-#define vsetvlmax_e8m1() __builtin_rvv_vsetvlimax(0, 0)
-#define vsetvlmax_e8m2() __builtin_rvv_vsetvlimax(0, 1)
-#define vsetvlmax_e8m4() __builtin_rvv_vsetvlimax(0, 2)
-#define vsetvlmax_e8m8() __builtin_rvv_vsetvlimax(0, 3)
+#define __riscv_vsetvlmax_e8mf4() __builtin_rvv_vsetvlimax(0, 6)
+#define __riscv_vsetvlmax_e8mf2() __builtin_rvv_vsetvlimax(0, 7)
+#define __riscv_vsetvlmax_e8m1() __builtin_rvv_vsetvlimax(0, 0)
+#define __riscv_vsetvlmax_e8m2() __builtin_rvv_vsetvlimax(0, 1)
+#define __riscv_vsetvlmax_e8m4() __builtin_rvv_vsetvlimax(0, 2)
+#define __riscv_vsetvlmax_e8m8() __builtin_rvv_vsetvlimax(0, 3)
-#define vsetvlmax_e16mf2() __builtin_rvv_vsetvlimax(1, 7)
-#define vsetvlmax_e16m1() __builtin_rvv_vsetvlimax(1, 0)
-#define vsetvlmax_e16m2() __builtin_rvv_vsetvlimax(1, 1)
-#define vsetvlmax_e16m4() __builtin_rvv_vsetvlimax(1, 2)
-#define vsetvlmax_e16m8() __builtin_rvv_vsetvlimax(1, 3)
+#define __riscv_vsetvlmax_e16mf2() __builtin_rvv_vsetvlimax(1, 7)
+#define __riscv_vsetvlmax_e16m1() __builtin_rvv_vsetvlimax(1, 0)
+#define __riscv_vsetvlmax_e16m2() __builtin_rvv_vsetvlimax(1, 1)
+#define __riscv_vsetvlmax_e16m4() __builtin_rvv_vsetvlimax(1, 2)
+#define __riscv_vsetvlmax_e16m8() __builtin_rvv_vsetvlimax(1, 3)
-#define vsetvlmax_e32m1() __builtin_rvv_vsetvlimax(2, 0)
-#define vsetvlmax_e32m2() __builtin_rvv_vsetvlimax(2, 1)
-#define vsetvlmax_e32m4() __builtin_rvv_vsetvlimax(2, 2)
-#define vsetvlmax_e32m8() __builtin_rvv_vsetvlimax(2, 3)
+#define __riscv_vsetvlmax_e32m1() __builtin_rvv_vsetvlimax(2, 0)
+#define __riscv_vsetvlmax_e32m2() __builtin_rvv_vsetvlimax(2, 1)
+#define __riscv_vsetvlmax_e32m4() __builtin_rvv_vsetvlimax(2, 2)
+#define __riscv_vsetvlmax_e32m8() __builtin_rvv_vsetvlimax(2, 3)
#if __riscv_v_elen >= 64
-#define vsetvlmax_e8mf8() __builtin_rvv_vsetvlimax(0, 5)
-#define vsetvlmax_e16mf4() __builtin_rvv_vsetvlimax(1, 6)
-#define vsetvlmax_e32mf2() __builtin_rvv_vsetvlimax(2, 7)
-
-#define vsetvlmax_e64m1() __builtin_rvv_vsetvlimax(3, 0)
-#define vsetvlmax_e64m2() __builtin_rvv_vsetvlimax(3, 1)
-#define vsetvlmax_e64m4() __builtin_rvv_vsetvlimax(3, 2)
-#define vsetvlmax_e64m8() __builtin_rvv_vsetvlimax(3, 3)
+#define __riscv_vsetvlmax_e8mf8() __builtin_rvv_vsetvlimax(0, 5)
+#define __riscv_vsetvlmax_e16mf4() __builtin_rvv_vsetvlimax(1, 6)
+#define __riscv_vsetvlmax_e32mf2() __builtin_rvv_vsetvlimax(2, 7)
+
+#define __riscv_vsetvlmax_e64m1() __builtin_rvv_vsetvlimax(3, 0)
+#define __riscv_vsetvlmax_e64m2() __builtin_rvv_vsetvlimax(3, 1)
+#define __riscv_vsetvlmax_e64m4() __builtin_rvv_vsetvlimax(3, 2)
+#define __riscv_vsetvlmax_e64m8() __builtin_rvv_vsetvlimax(3, 3)
#endif
}] in
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c
index 23350f5906be6..7b940daabcc9b 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvl.c
@@ -12,7 +12,7 @@
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8mf8(size_t avl) {
- return vsetvl_e8mf8(avl);
+ return __riscv_vsetvl_e8mf8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8mf4(
@@ -21,7 +21,7 @@ size_t test_vsetvl_e8mf8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8mf4(size_t avl) {
- return vsetvl_e8mf4(avl);
+ return __riscv_vsetvl_e8mf4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8mf2(
@@ -30,7 +30,7 @@ size_t test_vsetvl_e8mf4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8mf2(size_t avl) {
- return vsetvl_e8mf2(avl);
+ return __riscv_vsetvl_e8mf2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m1(
@@ -39,7 +39,7 @@ size_t test_vsetvl_e8mf2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m1(size_t avl) {
- return vsetvl_e8m1(avl);
+ return __riscv_vsetvl_e8m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m2(
@@ -48,7 +48,7 @@ size_t test_vsetvl_e8m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m2(size_t avl) {
- return vsetvl_e8m2(avl);
+ return __riscv_vsetvl_e8m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m4(
@@ -57,7 +57,7 @@ size_t test_vsetvl_e8m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m4(size_t avl) {
- return vsetvl_e8m4(avl);
+ return __riscv_vsetvl_e8m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m8(
@@ -66,7 +66,7 @@ size_t test_vsetvl_e8m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m8(size_t avl) {
- return vsetvl_e8m8(avl);
+ return __riscv_vsetvl_e8m8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16mf4(
@@ -75,7 +75,7 @@ size_t test_vsetvl_e8m8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16mf4(size_t avl) {
- return vsetvl_e16mf4(avl);
+ return __riscv_vsetvl_e16mf4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16mf2(
@@ -84,7 +84,7 @@ size_t test_vsetvl_e16mf4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16mf2(size_t avl) {
- return vsetvl_e16mf2(avl);
+ return __riscv_vsetvl_e16mf2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m1(
@@ -93,7 +93,7 @@ size_t test_vsetvl_e16mf2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m1(size_t avl) {
- return vsetvl_e16m1(avl);
+ return __riscv_vsetvl_e16m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m2(
@@ -102,7 +102,7 @@ size_t test_vsetvl_e16m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m2(size_t avl) {
- return vsetvl_e16m2(avl);
+ return __riscv_vsetvl_e16m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m4(
@@ -111,7 +111,7 @@ size_t test_vsetvl_e16m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m4(size_t avl) {
- return vsetvl_e16m4(avl);
+ return __riscv_vsetvl_e16m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m8(
@@ -120,7 +120,7 @@ size_t test_vsetvl_e16m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m8(size_t avl) {
- return vsetvl_e16m8(avl);
+ return __riscv_vsetvl_e16m8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32mf2(
@@ -129,7 +129,7 @@ size_t test_vsetvl_e16m8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32mf2(size_t avl) {
- return vsetvl_e32mf2(avl);
+ return __riscv_vsetvl_e32mf2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m1(
@@ -138,7 +138,7 @@ size_t test_vsetvl_e32mf2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m1(size_t avl) {
- return vsetvl_e32m1(avl);
+ return __riscv_vsetvl_e32m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m2(
@@ -147,7 +147,7 @@ size_t test_vsetvl_e32m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m2(size_t avl) {
- return vsetvl_e32m2(avl);
+ return __riscv_vsetvl_e32m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m4(
@@ -156,7 +156,7 @@ size_t test_vsetvl_e32m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m4(size_t avl) {
- return vsetvl_e32m4(avl);
+ return __riscv_vsetvl_e32m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m8(
@@ -165,7 +165,7 @@ size_t test_vsetvl_e32m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m8(size_t avl) {
- return vsetvl_e32m8(avl);
+ return __riscv_vsetvl_e32m8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m1(
@@ -174,7 +174,7 @@ size_t test_vsetvl_e32m8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m1(size_t avl) {
- return vsetvl_e64m1(avl);
+ return __riscv_vsetvl_e64m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m2(
@@ -183,7 +183,7 @@ size_t test_vsetvl_e64m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m2(size_t avl) {
- return vsetvl_e64m2(avl);
+ return __riscv_vsetvl_e64m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m4(
@@ -192,7 +192,7 @@ size_t test_vsetvl_e64m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m4(size_t avl) {
- return vsetvl_e64m4(avl);
+ return __riscv_vsetvl_e64m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m8(
@@ -201,6 +201,6 @@ size_t test_vsetvl_e64m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m8(size_t avl) {
- return vsetvl_e64m8(avl);
+ return __riscv_vsetvl_e64m8(avl);
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c
index a693bab86fe4d..b3808911ca836 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsetvlmax.c
@@ -12,7 +12,7 @@
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8mf8() {
- return vsetvlmax_e8mf8();
+ return __riscv_vsetvlmax_e8mf8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8mf4(
@@ -21,7 +21,7 @@ size_t test_vsetvlmax_e8mf8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8mf4() {
- return vsetvlmax_e8mf4();
+ return __riscv_vsetvlmax_e8mf4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8mf2(
@@ -30,7 +30,7 @@ size_t test_vsetvlmax_e8mf4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8mf2() {
- return vsetvlmax_e8mf2();
+ return __riscv_vsetvlmax_e8mf2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m1(
@@ -39,7 +39,7 @@ size_t test_vsetvlmax_e8mf2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m1() {
- return vsetvlmax_e8m1();
+ return __riscv_vsetvlmax_e8m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m2(
@@ -48,7 +48,7 @@ size_t test_vsetvlmax_e8m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m2() {
- return vsetvlmax_e8m2();
+ return __riscv_vsetvlmax_e8m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m4(
@@ -57,7 +57,7 @@ size_t test_vsetvlmax_e8m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m4() {
- return vsetvlmax_e8m4();
+ return __riscv_vsetvlmax_e8m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m8(
@@ -66,7 +66,7 @@ size_t test_vsetvlmax_e8m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m8() {
- return vsetvlmax_e8m8();
+ return __riscv_vsetvlmax_e8m8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16mf4(
@@ -75,7 +75,7 @@ size_t test_vsetvlmax_e8m8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16mf4() {
- return vsetvlmax_e16mf4();
+ return __riscv_vsetvlmax_e16mf4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16mf2(
@@ -84,7 +84,7 @@ size_t test_vsetvlmax_e16mf4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16mf2() {
- return vsetvlmax_e16mf2();
+ return __riscv_vsetvlmax_e16mf2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m1(
@@ -93,7 +93,7 @@ size_t test_vsetvlmax_e16mf2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m1() {
- return vsetvlmax_e16m1();
+ return __riscv_vsetvlmax_e16m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m2(
@@ -102,7 +102,7 @@ size_t test_vsetvlmax_e16m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m2() {
- return vsetvlmax_e16m2();
+ return __riscv_vsetvlmax_e16m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m4(
@@ -111,7 +111,7 @@ size_t test_vsetvlmax_e16m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m4() {
- return vsetvlmax_e16m4();
+ return __riscv_vsetvlmax_e16m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m8(
@@ -120,7 +120,7 @@ size_t test_vsetvlmax_e16m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m8() {
- return vsetvlmax_e16m8();
+ return __riscv_vsetvlmax_e16m8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32mf2(
@@ -129,7 +129,7 @@ size_t test_vsetvlmax_e16m8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32mf2() {
- return vsetvlmax_e32mf2();
+ return __riscv_vsetvlmax_e32mf2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m1(
@@ -138,7 +138,7 @@ size_t test_vsetvlmax_e32mf2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m1() {
- return vsetvlmax_e32m1();
+ return __riscv_vsetvlmax_e32m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m2(
@@ -147,7 +147,7 @@ size_t test_vsetvlmax_e32m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m2() {
- return vsetvlmax_e32m2();
+ return __riscv_vsetvlmax_e32m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m4(
@@ -156,7 +156,7 @@ size_t test_vsetvlmax_e32m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m4() {
- return vsetvlmax_e32m4();
+ return __riscv_vsetvlmax_e32m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m8(
@@ -165,7 +165,7 @@ size_t test_vsetvlmax_e32m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m8() {
- return vsetvlmax_e32m8();
+ return __riscv_vsetvlmax_e32m8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m1(
@@ -174,7 +174,7 @@ size_t test_vsetvlmax_e32m8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m1() {
- return vsetvlmax_e64m1();
+ return __riscv_vsetvlmax_e64m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m2(
@@ -183,7 +183,7 @@ size_t test_vsetvlmax_e64m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m2() {
- return vsetvlmax_e64m2();
+ return __riscv_vsetvlmax_e64m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m4(
@@ -192,7 +192,7 @@ size_t test_vsetvlmax_e64m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m4() {
- return vsetvlmax_e64m4();
+ return __riscv_vsetvlmax_e64m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m8(
@@ -201,6 +201,6 @@ size_t test_vsetvlmax_e64m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m8() {
- return vsetvlmax_e64m8();
+ return __riscv_vsetvlmax_e64m8();
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c
index 23350f5906be6..7b940daabcc9b 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvl.c
@@ -12,7 +12,7 @@
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8mf8(size_t avl) {
- return vsetvl_e8mf8(avl);
+ return __riscv_vsetvl_e8mf8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8mf4(
@@ -21,7 +21,7 @@ size_t test_vsetvl_e8mf8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8mf4(size_t avl) {
- return vsetvl_e8mf4(avl);
+ return __riscv_vsetvl_e8mf4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8mf2(
@@ -30,7 +30,7 @@ size_t test_vsetvl_e8mf4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8mf2(size_t avl) {
- return vsetvl_e8mf2(avl);
+ return __riscv_vsetvl_e8mf2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m1(
@@ -39,7 +39,7 @@ size_t test_vsetvl_e8mf2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m1(size_t avl) {
- return vsetvl_e8m1(avl);
+ return __riscv_vsetvl_e8m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m2(
@@ -48,7 +48,7 @@ size_t test_vsetvl_e8m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m2(size_t avl) {
- return vsetvl_e8m2(avl);
+ return __riscv_vsetvl_e8m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m4(
@@ -57,7 +57,7 @@ size_t test_vsetvl_e8m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m4(size_t avl) {
- return vsetvl_e8m4(avl);
+ return __riscv_vsetvl_e8m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e8m8(
@@ -66,7 +66,7 @@ size_t test_vsetvl_e8m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e8m8(size_t avl) {
- return vsetvl_e8m8(avl);
+ return __riscv_vsetvl_e8m8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16mf4(
@@ -75,7 +75,7 @@ size_t test_vsetvl_e8m8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16mf4(size_t avl) {
- return vsetvl_e16mf4(avl);
+ return __riscv_vsetvl_e16mf4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16mf2(
@@ -84,7 +84,7 @@ size_t test_vsetvl_e16mf4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16mf2(size_t avl) {
- return vsetvl_e16mf2(avl);
+ return __riscv_vsetvl_e16mf2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m1(
@@ -93,7 +93,7 @@ size_t test_vsetvl_e16mf2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m1(size_t avl) {
- return vsetvl_e16m1(avl);
+ return __riscv_vsetvl_e16m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m2(
@@ -102,7 +102,7 @@ size_t test_vsetvl_e16m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m2(size_t avl) {
- return vsetvl_e16m2(avl);
+ return __riscv_vsetvl_e16m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m4(
@@ -111,7 +111,7 @@ size_t test_vsetvl_e16m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m4(size_t avl) {
- return vsetvl_e16m4(avl);
+ return __riscv_vsetvl_e16m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e16m8(
@@ -120,7 +120,7 @@ size_t test_vsetvl_e16m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e16m8(size_t avl) {
- return vsetvl_e16m8(avl);
+ return __riscv_vsetvl_e16m8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32mf2(
@@ -129,7 +129,7 @@ size_t test_vsetvl_e16m8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32mf2(size_t avl) {
- return vsetvl_e32mf2(avl);
+ return __riscv_vsetvl_e32mf2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m1(
@@ -138,7 +138,7 @@ size_t test_vsetvl_e32mf2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m1(size_t avl) {
- return vsetvl_e32m1(avl);
+ return __riscv_vsetvl_e32m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m2(
@@ -147,7 +147,7 @@ size_t test_vsetvl_e32m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m2(size_t avl) {
- return vsetvl_e32m2(avl);
+ return __riscv_vsetvl_e32m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m4(
@@ -156,7 +156,7 @@ size_t test_vsetvl_e32m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m4(size_t avl) {
- return vsetvl_e32m4(avl);
+ return __riscv_vsetvl_e32m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e32m8(
@@ -165,7 +165,7 @@ size_t test_vsetvl_e32m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e32m8(size_t avl) {
- return vsetvl_e32m8(avl);
+ return __riscv_vsetvl_e32m8(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m1(
@@ -174,7 +174,7 @@ size_t test_vsetvl_e32m8(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m1(size_t avl) {
- return vsetvl_e64m1(avl);
+ return __riscv_vsetvl_e64m1(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m2(
@@ -183,7 +183,7 @@ size_t test_vsetvl_e64m1(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m2(size_t avl) {
- return vsetvl_e64m2(avl);
+ return __riscv_vsetvl_e64m2(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m4(
@@ -192,7 +192,7 @@ size_t test_vsetvl_e64m2(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m4(size_t avl) {
- return vsetvl_e64m4(avl);
+ return __riscv_vsetvl_e64m4(avl);
}
// CHECK-RV64-LABEL: @test_vsetvl_e64m8(
@@ -201,6 +201,6 @@ size_t test_vsetvl_e64m4(size_t avl) {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvl_e64m8(size_t avl) {
- return vsetvl_e64m8(avl);
+ return __riscv_vsetvl_e64m8(avl);
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c
index a693bab86fe4d..b3808911ca836 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsetvlmax.c
@@ -12,7 +12,7 @@
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8mf8() {
- return vsetvlmax_e8mf8();
+ return __riscv_vsetvlmax_e8mf8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8mf4(
@@ -21,7 +21,7 @@ size_t test_vsetvlmax_e8mf8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8mf4() {
- return vsetvlmax_e8mf4();
+ return __riscv_vsetvlmax_e8mf4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8mf2(
@@ -30,7 +30,7 @@ size_t test_vsetvlmax_e8mf4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8mf2() {
- return vsetvlmax_e8mf2();
+ return __riscv_vsetvlmax_e8mf2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m1(
@@ -39,7 +39,7 @@ size_t test_vsetvlmax_e8mf2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m1() {
- return vsetvlmax_e8m1();
+ return __riscv_vsetvlmax_e8m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m2(
@@ -48,7 +48,7 @@ size_t test_vsetvlmax_e8m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m2() {
- return vsetvlmax_e8m2();
+ return __riscv_vsetvlmax_e8m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m4(
@@ -57,7 +57,7 @@ size_t test_vsetvlmax_e8m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m4() {
- return vsetvlmax_e8m4();
+ return __riscv_vsetvlmax_e8m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e8m8(
@@ -66,7 +66,7 @@ size_t test_vsetvlmax_e8m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e8m8() {
- return vsetvlmax_e8m8();
+ return __riscv_vsetvlmax_e8m8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16mf4(
@@ -75,7 +75,7 @@ size_t test_vsetvlmax_e8m8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16mf4() {
- return vsetvlmax_e16mf4();
+ return __riscv_vsetvlmax_e16mf4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16mf2(
@@ -84,7 +84,7 @@ size_t test_vsetvlmax_e16mf4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16mf2() {
- return vsetvlmax_e16mf2();
+ return __riscv_vsetvlmax_e16mf2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m1(
@@ -93,7 +93,7 @@ size_t test_vsetvlmax_e16mf2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m1() {
- return vsetvlmax_e16m1();
+ return __riscv_vsetvlmax_e16m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m2(
@@ -102,7 +102,7 @@ size_t test_vsetvlmax_e16m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m2() {
- return vsetvlmax_e16m2();
+ return __riscv_vsetvlmax_e16m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m4(
@@ -111,7 +111,7 @@ size_t test_vsetvlmax_e16m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m4() {
- return vsetvlmax_e16m4();
+ return __riscv_vsetvlmax_e16m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e16m8(
@@ -120,7 +120,7 @@ size_t test_vsetvlmax_e16m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e16m8() {
- return vsetvlmax_e16m8();
+ return __riscv_vsetvlmax_e16m8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32mf2(
@@ -129,7 +129,7 @@ size_t test_vsetvlmax_e16m8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32mf2() {
- return vsetvlmax_e32mf2();
+ return __riscv_vsetvlmax_e32mf2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m1(
@@ -138,7 +138,7 @@ size_t test_vsetvlmax_e32mf2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m1() {
- return vsetvlmax_e32m1();
+ return __riscv_vsetvlmax_e32m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m2(
@@ -147,7 +147,7 @@ size_t test_vsetvlmax_e32m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m2() {
- return vsetvlmax_e32m2();
+ return __riscv_vsetvlmax_e32m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m4(
@@ -156,7 +156,7 @@ size_t test_vsetvlmax_e32m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m4() {
- return vsetvlmax_e32m4();
+ return __riscv_vsetvlmax_e32m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e32m8(
@@ -165,7 +165,7 @@ size_t test_vsetvlmax_e32m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e32m8() {
- return vsetvlmax_e32m8();
+ return __riscv_vsetvlmax_e32m8();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m1(
@@ -174,7 +174,7 @@ size_t test_vsetvlmax_e32m8() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m1() {
- return vsetvlmax_e64m1();
+ return __riscv_vsetvlmax_e64m1();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m2(
@@ -183,7 +183,7 @@ size_t test_vsetvlmax_e64m1() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m2() {
- return vsetvlmax_e64m2();
+ return __riscv_vsetvlmax_e64m2();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m4(
@@ -192,7 +192,7 @@ size_t test_vsetvlmax_e64m2() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m4() {
- return vsetvlmax_e64m4();
+ return __riscv_vsetvlmax_e64m4();
}
// CHECK-RV64-LABEL: @test_vsetvlmax_e64m8(
@@ -201,6 +201,6 @@ size_t test_vsetvlmax_e64m4() {
// CHECK-RV64-NEXT: ret i64 [[TMP0]]
//
size_t test_vsetvlmax_e64m8() {
- return vsetvlmax_e64m8();
+ return __riscv_vsetvlmax_e64m8();
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vread-csr.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vread-csr.c
index d4334bddc1b90..9605d0c88b8f5 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vread-csr.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vread-csr.c
@@ -11,7 +11,7 @@
// CHECK-NEXT: ret i64 [[TMP0]]
//
unsigned long vread_csr_vstart(void) {
- return vread_csr(RVV_VSTART);
+ return __riscv_vread_csr(RVV_VSTART);
}
// CHECK-LABEL: @vread_csr_vxsat(
@@ -20,7 +20,7 @@ unsigned long vread_csr_vstart(void) {
// CHECK-NEXT: ret i64 [[TMP0]]
//
unsigned long vread_csr_vxsat(void) {
- return vread_csr(RVV_VXSAT);
+ return __riscv_vread_csr(RVV_VXSAT);
}
// CHECK-LABEL: @vread_csr_vxrm(
@@ -29,7 +29,7 @@ unsigned long vread_csr_vxsat(void) {
// CHECK-NEXT: ret i64 [[TMP0]]
//
unsigned long vread_csr_vxrm(void) {
- return vread_csr(RVV_VXRM);
+ return __riscv_vread_csr(RVV_VXRM);
}
// CHECK-LABEL: @vread_csr_vcsr(
@@ -38,5 +38,5 @@ unsigned long vread_csr_vxrm(void) {
// CHECK-NEXT: ret i64 [[TMP0]]
//
unsigned long vread_csr_vcsr(void) {
- return vread_csr(RVV_VCSR);
+ return __riscv_vread_csr(RVV_VCSR);
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vwrite-csr.c b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vwrite-csr.c
index a94f599d7c7c3..01da208b7bdce 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vwrite-csr.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vwrite-csr.c
@@ -11,7 +11,7 @@
// CHECK-NEXT: ret void
//
void vwrite_csr_vstart(unsigned long value) {
- vwrite_csr(RVV_VSTART, value);
+ __riscv_vwrite_csr(RVV_VSTART, value);
}
// CHECK-LABEL: @vwrite_csr_vxsat(
@@ -20,7 +20,7 @@ void vwrite_csr_vstart(unsigned long value) {
// CHECK-NEXT: ret void
//
void vwrite_csr_vxsat(unsigned long value) {
- vwrite_csr(RVV_VXSAT, value);
+ __riscv_vwrite_csr(RVV_VXSAT, value);
}
// CHECK-LABEL: @vwrite_csr_vxrm(
@@ -29,7 +29,7 @@ void vwrite_csr_vxsat(unsigned long value) {
// CHECK-NEXT: ret void
//
void vwrite_csr_vxrm(unsigned long value) {
- vwrite_csr(RVV_VXRM, value);
+ __riscv_vwrite_csr(RVV_VXRM, value);
}
// CHECK-LABEL: @vwrite_csr_vcsr(
@@ -38,5 +38,5 @@ void vwrite_csr_vxrm(unsigned long value) {
// CHECK-NEXT: ret void
//
void vwrite_csr_vcsr(unsigned long value) {
- vwrite_csr(RVV_VCSR, value);
+ __riscv_vwrite_csr(RVV_VCSR, value);
}
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