[clang] 526966d - Use llvm::bit_ceil (NFC)
Kazu Hirata via cfe-commits
cfe-commits at lists.llvm.org
Sat Jan 28 16:13:16 PST 2023
Author: Kazu Hirata
Date: 2023-01-28T16:13:09-08:00
New Revision: 526966d07dc89ad69940259020d97d25f26b1306
URL: https://github.com/llvm/llvm-project/commit/526966d07dc89ad69940259020d97d25f26b1306
DIFF: https://github.com/llvm/llvm-project/commit/526966d07dc89ad69940259020d97d25f26b1306.diff
LOG: Use llvm::bit_ceil (NFC)
Note that:
std::has_single_bit(X) ? X : llvm::NextPowerOf2(X);
is equivalent to:
std::bit_ceil(X)
even for input 0.
Added:
Modified:
clang/lib/AST/ASTContext.cpp
clang/lib/CodeGen/TargetInfo.cpp
llvm/lib/Analysis/IVDescriptors.cpp
llvm/lib/Analysis/VectorUtils.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/lib/Transforms/Utils/VNCoercion.cpp
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Removed:
################################################################################
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 06807ffc4826..9ff1216548c1 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -2502,8 +2502,7 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const {
// favorable to atomic operations:
// Round the size up to a power of 2.
- if (!llvm::isPowerOf2_64(Width))
- Width = llvm::NextPowerOf2(Width);
+ Width = llvm::bit_ceil(Width);
// Set the alignment equal to the size.
Align = static_cast<unsigned>(Width);
diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp
index a9119abad81d..77db1153e1dd 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -8761,8 +8761,7 @@ ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty,
Align = Size <= 32 ? 32 : 64;
if (Size <= Align) {
// Pass in the smallest viable integer type.
- if (!llvm::isPowerOf2_64(Size))
- Size = llvm::NextPowerOf2(Size);
+ Size = llvm::bit_ceil(Size);
return ABIArgInfo::getDirect(llvm::Type::getIntNTy(getVMContext(), Size));
}
return DefaultABIInfo::classifyArgumentType(Ty);
@@ -8807,8 +8806,7 @@ ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const {
// are returned indirectly.
if (Size <= 64) {
// Return in the smallest viable integer type.
- if (!llvm::isPowerOf2_64(Size))
- Size = llvm::NextPowerOf2(Size);
+ Size = llvm::bit_ceil(Size);
return ABIArgInfo::getDirect(llvm::Type::getIntNTy(getVMContext(), Size));
}
return getNaturalAlignIndirect(RetTy, /*ByVal=*/true);
diff --git a/llvm/lib/Analysis/IVDescriptors.cpp b/llvm/lib/Analysis/IVDescriptors.cpp
index 950541ace9d7..8b9e5c6f56f7 100644
--- a/llvm/lib/Analysis/IVDescriptors.cpp
+++ b/llvm/lib/Analysis/IVDescriptors.cpp
@@ -128,8 +128,7 @@ static std::pair<Type *, bool> computeRecurrenceType(Instruction *Exit,
++MaxBitWidth;
}
}
- if (!isPowerOf2_64(MaxBitWidth))
- MaxBitWidth = NextPowerOf2(MaxBitWidth);
+ MaxBitWidth = llvm::bit_ceil(MaxBitWidth);
return std::make_pair(Type::getIntNTy(Exit->getContext(), MaxBitWidth),
IsSigned);
diff --git a/llvm/lib/Analysis/VectorUtils.cpp b/llvm/lib/Analysis/VectorUtils.cpp
index c96e320fa78a..31c2de15d602 100644
--- a/llvm/lib/Analysis/VectorUtils.cpp
+++ b/llvm/lib/Analysis/VectorUtils.cpp
@@ -772,8 +772,7 @@ llvm::computeMinimumValueSizes(ArrayRef<BasicBlock *> Blocks, DemandedBits &DB,
uint64_t MinBW = llvm::bit_width(LeaderDemandedBits);
// Round up to a power of 2
- if (!isPowerOf2_64((uint64_t)MinBW))
- MinBW = NextPowerOf2(MinBW);
+ MinBW = llvm::bit_ceil(MinBW);
// We don't modify the types of PHIs. Reductions will already have been
// truncated if possible, and inductions' sizes will have been chosen by
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 208de4b73d91..429184d64ffb 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -576,8 +576,7 @@ bool TargetLowering::ShrinkDemandedOp(SDValue Op, unsigned BitWidth,
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
unsigned DemandedSize = Demanded.getActiveBits();
unsigned SmallVTBits = DemandedSize;
- if (!isPowerOf2_32(SmallVTBits))
- SmallVTBits = NextPowerOf2(SmallVTBits);
+ SmallVTBits = llvm::bit_ceil(SmallVTBits);
for (; SmallVTBits < BitWidth; SmallVTBits = NextPowerOf2(SmallVTBits)) {
EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits);
if (TLI.isTruncateFree(Op.getValueType(), SmallVT) &&
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index da8b87babc2d..ee621c32f906 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1137,8 +1137,7 @@ static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
unsigned LaneSizeInBits = NewVT.getScalarSizeInBits();
// Convert sizes such as i33 to i64.
- if (!isPowerOf2_32(LaneSizeInBits))
- LaneSizeInBits = NextPowerOf2(LaneSizeInBits);
+ LaneSizeInBits = llvm::bit_ceil(LaneSizeInBits);
MVT DestVT = TLI->getRegisterType(NewVT);
RegisterVT = DestVT;
diff --git a/llvm/lib/Transforms/Utils/VNCoercion.cpp b/llvm/lib/Transforms/Utils/VNCoercion.cpp
index f295a7e312b6..036ff1655014 100644
--- a/llvm/lib/Transforms/Utils/VNCoercion.cpp
+++ b/llvm/lib/Transforms/Utils/VNCoercion.cpp
@@ -472,9 +472,7 @@ Value *getLoadValueForLoad(LoadInst *SrcVal, unsigned Offset, Type *LoadTy,
assert(SrcVal->getType()->isIntegerTy() && "Can't widen non-integer load");
// If we have a load/load clobber an DepLI can be widened to cover this
// load, then we should widen it to the next power of 2 size big enough!
- unsigned NewLoadSize = Offset + LoadSize;
- if (!isPowerOf2_32(NewLoadSize))
- NewLoadSize = NextPowerOf2(NewLoadSize);
+ unsigned NewLoadSize = llvm::bit_ceil(Offset + LoadSize);
Value *PtrVal = SrcVal->getPointerOperand();
// Insert the new load after the old load. This ensures that subsequent
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 60333aa28a0e..7719a13a9926 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -11223,8 +11223,7 @@ void BoUpSLP::computeMinimumValueSizes() {
}
// Round MaxBitWidth up to the next power-of-two.
- if (!isPowerOf2_64(MaxBitWidth))
- MaxBitWidth = NextPowerOf2(MaxBitWidth);
+ MaxBitWidth = llvm::bit_ceil(MaxBitWidth);
// If the maximum bit width we compute is less than the with of the roots'
// type, we can proceed with the narrowing. Otherwise, do nothing.
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