[PATCH] D131141: [RISCV] Add MC support of RISCV Zcb Extension

[Luís Marques via Phabricator via cfe-commits]

luismarques added a comment.

Possibly we want to add this change to the release notes?



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Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:304-308
+                       "'Zcb' (Shortened format for basic bit manipulation instructions)", 
+                       [FeatureExtZca]>;
+def HasStdExtZcb : Predicate<"Subtarget->hasStdExtZcb()">,
+                             AssemblerPredicate<(all_of FeatureExtZcb),
+                             "'Zcb' (Shortened format for basic bit manipulation instructions)">;
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Is there any particular reason why this is described as a "shortened format" instead of the more common "compressed"?


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZc.td:9-10
+///
+/// This file describes the RISC-V instructions from the 'Zc' Code-size 
+/// reduction extension, version 0.70.4.
+/// This version is still experimental as the 'Zc' extension hasn't been
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Ditto "Code-size reduction" -> "compressed"?


Repository:
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  https://reviews.llvm.org/D131141/new/

https://reviews.llvm.org/D131141