[PATCH] D142144: [RISCV][Driver] Add -mrvv-vector-bits= option similar to -msve-vector-bits=

[Philip Reames via Phabricator via cfe-commits]

reames added a comment.

Generally supportive of having such an option, but going to defer to others on the review.  I don't work enough on clang to have an opinion on code here.



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Comment at: clang/docs/ReleaseNotes.rst:844
   take architecture extensions from ``-march`` if both are given.
+- Added -rvv-vector-bits= option to give an upper bound on vector length. Valid
+  values are powers of 2 between 64 and 65536. We also accept "zvl" to use
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MaskRay wrote:
> 
Correct me if I'm wrong, but doesn't this set both an upper and lower bound?  If so, the wording in the note here needs changed.  If not, the naming should probably be something like rvv-vector-bits-max.  


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142144/new/

https://reviews.llvm.org/D142144