[clang] ee700de - [AArch64] Armv9-A implies FP16
David Green via cfe-commits
cfe-commits at lists.llvm.org
Thu Jan 19 07:37:59 PST 2023
Author: David Green
Date: 2023-01-19T15:37:50Z
New Revision: ee700dec052a0336798fb2570faec31719b53f8d
URL: https://github.com/llvm/llvm-project/commit/ee700dec052a0336798fb2570faec31719b53f8d
DIFF: https://github.com/llvm/llvm-project/commit/ee700dec052a0336798fb2570faec31719b53f8d.diff
LOG: [AArch64] Armv9-A implies FP16
As Armv9-a implies SVE2 it implies SVE (added in D141411) and so it
should also imply FP16, which this patch adds. This helps get the target
features correct when using `target("arch=armv9-a")` attributes.
There is also an adjustment to AssertSameExtensionFlags in this patch to
make it print cpu names, useful when the TargetParser unit tests are run
through lit to distinguish which cpu is failing.
Differential Revision: https://reviews.llvm.org/D142087
Added:
Modified:
clang/test/CodeGen/aarch64-targetattr-arch.c
clang/test/CodeGen/aarch64-targetattr.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/unittests/TargetParser/TargetParserTest.cpp
Removed:
################################################################################
diff --git a/clang/test/CodeGen/aarch64-targetattr-arch.c b/clang/test/CodeGen/aarch64-targetattr-arch.c
index d70d68c6e6a21..86ddeac0b9e62 100644
--- a/clang/test/CodeGen/aarch64-targetattr-arch.c
+++ b/clang/test/CodeGen/aarch64-targetattr-arch.c
@@ -8,6 +8,7 @@
#endif
#include <arm_acle.h>
+#include <arm_fp16.h>
#include <arm_sve.h>
__attribute__((target("arch=armv8.1-a")))
@@ -22,6 +23,12 @@ svint8_t test_svadd_attr(svbool_t pg, svint8_t op1, svint8_t op2)
return svadd_s8_z(pg, op1, op2);
}
+__attribute__((target("arch=armv9-a")))
+float16_t test_fp16_on_v9(float16_t x, float16_t y)
+{
+ return vabdh_f16(x, y);
+}
+
void test_errors()
{
#ifdef HAS8
diff --git a/clang/test/CodeGen/aarch64-targetattr.c b/clang/test/CodeGen/aarch64-targetattr.c
index 8730ecfbd1343..6ce3c72c44b72 100644
--- a/clang/test/CodeGen/aarch64-targetattr.c
+++ b/clang/test/CodeGen/aarch64-targetattr.c
@@ -93,7 +93,7 @@ void nosimd() {}
// CHECK: attributes #1 = { {{.*}} "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a" }
// CHECK: attributes #2 = { {{.*}} "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8a" }
// CHECK: attributes #3 = { {{.*}} "target-features"="+aes,+bf16,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" }
-// CHECK: attributes #4 = { {{.*}} "target-cpu"="cortex-a710" "target-features"="+bf16,+crc,+dotprod,+flagm,+fp-armv8,+fp16fml,+i8mm,+lse,+mte,+neon,+pauth,+ras,+rcpc,+rdm,+sb,+sve,+sve2,+sve2-bitperm" }
+// CHECK: attributes #4 = { {{.*}} "target-cpu"="cortex-a710" "target-features"="+bf16,+crc,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+lse,+mte,+neon,+pauth,+ras,+rcpc,+rdm,+sb,+sve,+sve2,+sve2-bitperm" }
// CHECK: attributes #5 = { {{.*}} "tune-cpu"="cortex-a710" }
// CHECK: attributes #6 = { {{.*}} "target-cpu"="generic" }
// CHECK: attributes #7 = { {{.*}} "tune-cpu"="generic" }
diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 3c416e4576e56..ff6a629c8faa0 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -314,7 +314,7 @@ inline constexpr ArchInfo ARMV8_6A = { VersionTuple{8, 6}, AProfile, "armv8.6-a
inline constexpr ArchInfo ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)};
inline constexpr ArchInfo ARMV8_8A = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)};
inline constexpr ArchInfo ARMV8_9A = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts)};
-inline constexpr ArchInfo ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (BaseNoCrypto | AArch64::AEK_SVE | AArch64::AEK_SVE2)};
+inline constexpr ArchInfo ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (BaseNoCrypto | AArch64::AEK_FP16 | AArch64::AEK_SVE | AArch64::AEK_SVE2)};
inline constexpr ArchInfo ARMV9_1A = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)};
inline constexpr ArchInfo ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)};
inline constexpr ArchInfo ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)};
@@ -509,4 +509,4 @@ uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
} // namespace AArch64
} // namespace llvm
-#endif
\ No newline at end of file
+#endif
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 7bf20ef87436b..39de9e25c8cca 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -68,19 +68,26 @@ std::string FormatExtensionFlags(uint64_t Flags) {
return llvm::join(Features, ", ");
}
-template <ARM::ISAKind ISAKind>
-testing::AssertionResult
-AssertSameExtensionFlags(const char *m_expr, const char *n_expr,
- uint64_t ExpectedFlags, uint64_t GotFlags) {
- if (ExpectedFlags == GotFlags)
- return testing::AssertionSuccess();
-
- return testing::AssertionFailure() << llvm::formatv(
- "Expected extension flags: {0} ({1:x})\n"
- " Got extension flags: {2} ({3:x})\n",
- FormatExtensionFlags<ISAKind>(ExpectedFlags), ExpectedFlags,
- FormatExtensionFlags<ISAKind>(GotFlags), GotFlags);
-}
+template <ARM::ISAKind ISAKind> struct AssertSameExtensionFlags {
+ AssertSameExtensionFlags(StringRef CPUName) : CPUName(CPUName) {}
+
+ testing::AssertionResult operator()(const char *m_expr, const char *n_expr,
+ uint64_t ExpectedFlags,
+ uint64_t GotFlags) {
+ if (ExpectedFlags == GotFlags)
+ return testing::AssertionSuccess();
+
+ return testing::AssertionFailure() << llvm::formatv(
+ "CPU: {4}\n"
+ "Expected extension flags: {0} ({1:x})\n"
+ " Got extension flags: {2} ({3:x})\n",
+ FormatExtensionFlags<ISAKind>(ExpectedFlags), ExpectedFlags,
+ FormatExtensionFlags<ISAKind>(GotFlags), GotFlags, CPUName);
+ }
+
+private:
+ StringRef CPUName;
+};
struct ARMCPUTestParams {
ARMCPUTestParams(StringRef CPUName, StringRef ExpectedArch,
@@ -116,8 +123,9 @@ TEST_P(ARMCPUTestFixture, ARMCPUTests) {
EXPECT_EQ(params.ExpectedFPU, ARM::getFPUName(FPUKind));
uint64_t default_extensions = ARM::getDefaultExtensions(params.CPUName, AK);
- EXPECT_PRED_FORMAT2(AssertSameExtensionFlags<ARM::ISAKind::ARM>,
- params.ExpectedFlags, default_extensions);
+ EXPECT_PRED_FORMAT2(
+ AssertSameExtensionFlags<ARM::ISAKind::ARM>(params.CPUName),
+ params.ExpectedFlags, default_extensions);
EXPECT_EQ(params.CPUAttr, ARM::getCPUAttr(AK));
}
@@ -958,8 +966,9 @@ TEST_P(AArch64CPUTestFixture, testAArch64CPU) {
uint64_t default_extensions =
AArch64::getDefaultExtensions(params.CPUName, AI);
- EXPECT_PRED_FORMAT2(AssertSameExtensionFlags<ARM::ISAKind::AARCH64>,
- params.ExpectedFlags, default_extensions);
+ EXPECT_PRED_FORMAT2(
+ AssertSameExtensionFlags<ARM::ISAKind::AARCH64>(params.CPUName),
+ params.ExpectedFlags, default_extensions);
}
INSTANTIATE_TEST_SUITE_P(
@@ -997,7 +1006,8 @@ INSTANTIATE_TEST_SUITE_P(
AArch64::AEK_SVE | AArch64::AEK_SVE2 |
AArch64::AEK_SVE2BITPERM | AArch64::AEK_PAUTH |
AArch64::AEK_MTE | AArch64::AEK_SSBS |
- AArch64::AEK_FP16FML | AArch64::AEK_SB,
+ AArch64::AEK_FP16 | AArch64::AEK_FP16FML |
+ AArch64::AEK_SB,
"9-A"),
ARMCPUTestParams("cortex-a57", "armv8-a", "crypto-neon-fp-armv8",
AArch64::AEK_CRC | AArch64::AEK_CRYPTO |
@@ -1076,17 +1086,16 @@ INSTANTIATE_TEST_SUITE_P(
AArch64::AEK_PROFILE | AArch64::AEK_FLAGM |
AArch64::AEK_PAUTH | AArch64::AEK_FP16FML,
"8.2-A"),
- ARMCPUTestParams("cortex-a710", "armv9-a", "neon-fp-armv8",
- AArch64::AEK_CRC | AArch64::AEK_FP |
- AArch64::AEK_SIMD | AArch64::AEK_RAS |
- AArch64::AEK_LSE | AArch64::AEK_RDM |
- AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
- AArch64::AEK_MTE | AArch64::AEK_FP16FML |
- AArch64::AEK_SVE | AArch64::AEK_SVE2 |
- AArch64::AEK_SVE2BITPERM | AArch64::AEK_PAUTH |
- AArch64::AEK_FLAGM | AArch64::AEK_SB |
- AArch64::AEK_I8MM | AArch64::AEK_BF16,
- "9-A"),
+ ARMCPUTestParams(
+ "cortex-a710", "armv9-a", "neon-fp-armv8",
+ AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_SIMD |
+ AArch64::AEK_RAS | AArch64::AEK_LSE | AArch64::AEK_RDM |
+ AArch64::AEK_RCPC | AArch64::AEK_DOTPROD | AArch64::AEK_MTE |
+ AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SVE |
+ AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
+ AArch64::AEK_PAUTH | AArch64::AEK_FLAGM | AArch64::AEK_SB |
+ AArch64::AEK_I8MM | AArch64::AEK_BF16,
+ "9-A"),
ARMCPUTestParams("cortex-a715", "armv9-a", "neon-fp-armv8",
AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_BF16 |
AArch64::AEK_SIMD | AArch64::AEK_RAS |
@@ -1155,7 +1164,8 @@ INSTANTIATE_TEST_SUITE_P(
AArch64::AEK_I8MM | AArch64::AEK_BF16 |
AArch64::AEK_SVE | AArch64::AEK_SVE2 |
AArch64::AEK_SVE2BITPERM | AArch64::AEK_SSBS |
- AArch64::AEK_SB | AArch64::AEK_FP16FML,
+ AArch64::AEK_SB | AArch64::AEK_FP16 |
+ AArch64::AEK_FP16FML,
"9-A"),
ARMCPUTestParams("cortex-x3", "armv9-a", "neon-fp-armv8",
AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_BF16 |
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